xr16c2450ip Exar Corporation, xr16c2450ip Datasheet - Page 11

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xr16c2450ip

Manufacturer Part Number
xr16c2450ip
Description
Dual Uart With Higher Operating Speed And Lower Access Time
Manufacturer
Exar Corporation
Datasheet
xr
REV. 1.0.0
The 2450 UART provides an internal loopback capability for system diagnostic purposes. The internal
loopback mode is enabled by setting MCR register bit-4 to logic 1. All regular UART functions operate normally.
Figure 7
output is internally routed to the receive shift register input allowing the system to receive the same data that it
was sending. The TX pin is held at logic 1 or mark condition while RTS# and DTR# are de-asserted, and
CTS#, DSR# CD# and RI# inputs are ignored. Caution: the RX input must be held to a logic 1 during loopback
test else upon exiting the loopback test the UART may detect and report a false “break” signal.
2.10
Internal Loopback
shows how the modem port signals are re-configured. Transmit data from the transmit shift register
F
IGURE
7. I
NTERNAL
Transmit Shift Register
Receive Shift Register
L
OOP
(RHR/FIFO)
(THR/FIFO)
B
ACK IN
C
RTS#
CTS#
DTR#
DSR#
HANNELS
OP2#
CD#
RI#
MCR bit-4=1
11
VCC
VCC
OP1#
VCC
A
VCC
AND
B
TXA/TXB
RXA/RXB
RTSA#/RTSB#
CTSA#/CTSB
DTRA#/DTRB#
DSRA#/DSRB#
RIA#/RIB#
CDA#/CDB#
OP2A#/OP2B#
2.97V TO 5.5V DUART
XR16C2450

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