xr88c681 Exar Corporation, xr88c681 Datasheet - Page 43

• Manufacturer Part Number: xr88c681
• Description: Cmos Dual Channel Uart Duart
• Manufacturer: Exar Corporation

Z-80 CPU Interrupt Servicing Capability
The Z-80 CPU contains two interrupt request pins:
and
input pin; and
input pin. For the sake of interfacing to the DUART, we are
only concerned with the
The Z-80 CPU can be configured to operate in one of
three different interrupt modes:
D External Vectored
D Direct
D “Peripheral” Vectored
-
Rev. 2.11
INT.
-
NMI is the “Non-Maskable” interrupt request
Clock input
-
INT is the “Maskable” interrupt request
-
INT pin.
Figure 18. Schematic of Z-80 CPU Module
GND
+5V
PHI
-INT
-NMI
-WAIT
-BUSRQ
-HALT
-RFSH
-BUSAK
-RESET
A0 - A15
D0 - D7
-MREQ
-IORQ
-WR
-RD
-M1
-
NMI
43
Each of these interrupt modes use the
CPU and will be discussed in the following sections.
External Vectored Interrupt Processing (Interrupt
Mode 0)
The Z-80 P will operate in this interrupt mode if the “IM 0”
instruction has been executed. Whenever the
asserted by a peripheral device requesting an interrupt,
the CPU will complete its current instruction.
completion of this instruction, the CPU module will assert
-
Acknowledge” signal that the CPU module outputs in
order to initiate the process of interrupt servicing. When
the Z-80 CPU operates in the Interrupt Mode 0, it is
INTA (toggle “low”).
-
INTA is the active-low “Interrupt
XR88C681
-MEMW
-MEMR
-IOW
-INTA
-IOR
-
INT pin of the Z-80
-
INT pin is
After