ICS650-05 Integrated Circuit System, ICS650-05 Datasheet - Page 3

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ICS650-05

Manufacturer Part Number
ICS650-05
Description
HDTV Clock Synthesizer
Manufacturer
Integrated Circuit System
Datasheet
MDS 650-05 B
Integrated Circuit Systems • 525 Race Street • San Jose • CA • 95126 • (408) 295-9800tel • www.icst.com
Electrical Specifications
A minimum number of external components are required for proper operation. A decoupling capacitor of 0.01 µF
should be connected between VDD and GND on pins 4 and 6, and 16 and 14, and a 33
be used on each clock output if the trace is longer than 1 inch.
External Components
Notes: 1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device.
Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
Parameter
ABSOLUTE MAXIMUM RATINGS (note 1)
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Inputs and Clock Outputs
Ambient Operating Temperature
Soldering Temperature
Storage temperature
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
DC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Operating Voltage, VDD
Input High Voltage, VIH
Input Low Voltage, VIL
Input High Voltage, VIH
Input Low Voltage, VIL
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Voltage, VOH, VDD = 3.3 or 5V IOH=-8mA
Operating Supply Current, IDD, at 5V
Operating Supply Current, IDD, at 3.3V
Short Circuit Current, VDD = 3.3 V
Input Capacitance
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
AC CHARACTERISTICS (VDD = 3.3V or 5V unless noted)
Input Crystal or Clock Frequency
Output Clocks Accuracy (synthesis error)
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
One Sigma Jitter
Absolute Clock Period Jitter
Conditions
Referenced to GND
Referenced to GND
Max of 10 seconds
X1/ICLK
XI/ICLK
FRS, OE
FRS, OE
VDD=3.3V, IOH=-8mA
VDD=3.3V, IOL=8mA
No Load
No Load
Each output
Except X1
All clocks
0.8 to 2.0V
2.0 to 0.8V
At VDD/2
VDD = 3.3V, 13.5M,
FRCLK, 27M (pin 12)
VDD=3.3V, 27M (pin8),
54M
VDD=5.0V, except 27M
(pin8)
VDD = 5.0V, 27M (pin 8)
VDD=3.3V, except 27M
(pin 8), 54M
VDD=3.3V, 27M (pin 8),
54M
VDD=5.0V
3
HDTV Clock Synthesizer
Minimum
VDD/2+1
VDD-0.4
-0.5
-65
3.0
2.4
40
0
2
Typical
±125
±350
±175
±50
125
26
14
27
50
50
50
65
5
terminating resistor may
Maximum
VDD+0.5
VDD/2-1
ICS650-05
260
150
5.5
0.8
0.4
1.5
1.5
70
60
7
1
Revision 100301
Units
MHz
ppm
mA
mA
mA
pF
ns
ns
ps
ps
ps
ps
ps
ps
ps
°C
°C
°C
%
V
V
V
V
V
V
V
V
V
V

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