ICS83940 Integrated Circuit System, ICS83940 Datasheet

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ICS83940

Manufacturer Part Number
ICS83940
Description
Manufacturer
Integrated Circuit System
Datasheet

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Part Number:
ICS83940AY-02LF
Manufacturer:
IDT, Integrated Device Technology Inc
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ICS
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G
can accept LVPECL, CML, or SSTL input levels. The
LVCMOS_CLK can accept LVCMOS or LVTTL input levels.
The low impedance LVCMOS/LVTTL outputs are designed to
drive 50 series or parallel terminated transmission lines.
The ICS83940 is characterized at full 3.3V, full 2.5V and mixed
3.3V input and 2.5V output operating supply modes. Guaran-
teed output and part-to-part skew characteristics make the
ICS83940 ideal for those clock distribution applications de-
manding well defined performance and repeatability.
B
HiPerClockS™
83940BY
LVCMOS_CLK
,&6
LOCK
ENERAL
CLK_SEL
nPCLK
PCLK
D
The ICS83940 is a low skew, 1-to-18 LVPECL-
to-LVCMOS/LVTTL Fanout Buffer and a member
of the HiPerClockS™ family of High Performance
Clock Solutions from ICS. The ICS83940 has two
selectable clock inputs. The PCLK, nPCLK pair
IAGRAM
D
ESCRIPTION
0
1
www.icst.com/products/hiperclocks.html
18
Q0:Q17
LVPECL-
1
P
F
18 LVCMOS/LVTTL outputs, 16 typical output impedance
Selectable LVCMOS_CLK or LVPECL clock inputs
PCLK, nPCLK supports the following input types:
LVPECL, CML, SSTL
LVCMOS_CLK accepts the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 250MHz
Output skew: 150ps (maximum)
Part to part skew: 750ps (maximum)
Full 3.3V or 2.5V supply modes
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
Pin compatible with the MPC940L
IN
EATURES
LVCMOS_CLK
A
TO
CLK_SEL
SSIGNMENT
nPCLK
-LVCMOS/LVTTL F
PCLK
GND
GND
V
V
DDO
DD
7mm x 7mm x 1.4mm package body
1
2
3
4
5
6
7
8
32 31 30 29 28 27 26 25
9 10 11 12 13 14 15 16
32-Lead LQFP
ICS83940
Y Pacakge
Top View
L
OW
S
ICS83940
REV. A DECEMBER 12, 2002
ANOUT
KEW
24
23
22
21
20
19
18
17
, 1-
B
TO
Q6
Q7
Q8
V
Q9
Q10
Q11
GND
UFFER
DD
-18

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ICS83940 Summary of contents

Page 1

... LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/LVTTL outputs are designed to drive 50 series or parallel terminated transmission lines. The ICS83940 is characterized at full 3.3V, full 2.5V and mixed 3.3V input and 2.5V output operating supply modes. Guaran- teed output and part-to-part skew characteristics make the ICS83940 ideal for those clock distribution applications de- manding well defined performance and repeatability ...

Page 2

... " www.icst.com/products/hiperclocks.html 2 ICS83940 KEW ANOUT ...

Page 3

... www.icst.com/products/hiperclocks.html 3 ICS83940 KEW B ANOUT = 0° 70° ...

Page 4

... 2.5V±5 DDO www.icst.com/products/hiperclocks.html 4 ICS83940 KEW ANOUT ...

Page 5

... ICS83940 KEW B ANOUT ...

Page 6

... CMR V DDx UTPUT KEW 0.5V Clock Outputs 3. UTPUT ISE LVCMOS_CLK nPCLK 1.8V PCLK 0. Q0:Q17 P D ROPAGATION ELAY www.icst.com/products/hiperclocks.html 6 ICS83940 KEW TO B ANOUT UFFER SCOPE EST IRCUIT tsk(o) 2.4V 2.4V 0. ALL IME DDx ...

Page 7

... Single-Layer PCB, JEDEC Standard Test Boards Multi-Layer PCB, JEDEC Standard Test Boards NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs RANSISTOR OUNT The transistor count for ICS83940 is: 820 83940BY LVPECL- -LVCMOS/LVTTL ...

Page 8

... ° JEDEC P 95, MS-026 UBLICATION www.icst.com/products/hiperclocks.html 8 ICS83940 KEW TO B ANOUT UFFER ° ...

Page 9

... www.icst.com/products/hiperclocks.html 9 ICS83940 KEW B ANOUT ° ...

Page 10

... www.icst.com/products/hiperclocks.html 10 ICS83940 KEW TO B ANOUT ...

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