ICS83940-01 Integrated Circuit System, ICS83940-01 Datasheet - Page 9

• Manufacturer Part Number: ICS83940-01
• Manufacturer: Integrated Circuit System

W
Figure 1 shows how the differential input can be wired to accept
single ended levels. The reference voltage V_REF = V
generated by the bias resistors R1, R2 and C1. This bias circuit
should be located as close as possible to the input pin. The ratio
83940DY-01
IRING THE
D
IFFERENTIAL
I
F
NPUT TO
IGURE
Single Ended Clock Input
1. S
A
A
PPLICATION
www.icst.com/products/hiperclocks.html
CCEPT
INGLE
E
C1
0.1u
S
NDED
INGLE
V_REF
LVPECL-
DD
/2 is
S
IGNAL
E
9
I
NDED
of R1 and R2 might need to be adjusted to position the V_REF in
the center of the input voltage swing. For example, if the input
clock swing is only 2.5V and V
and R2/R1 = 0.609.
NFORMATION
D
1K
R1
1K
R2
RIVING
VDD
TO
L
EVELS
-LVCMOS / LVTTL F
nPCLK
D
PCLK
IFFERENTIAL
I
NPUT
DD
= 3.3V, V_REF should be 1.25V
L
ICS83940-01
OW
S
ANOUT
KEW
REV. A APRIL 11, 2003
, 1-
B
TO
UFFER
-18