74HC00D,653 NXP Semiconductors, 74HC00D,653 Datasheet - Page 9
![IC GATE NAND QUAD 2INPUT 14SOIC](/photos/6/57/65749/14-soic-sot108-1_sml.jpg)
74HC00D,653
Manufacturer Part Number
74HC00D,653
Description
IC GATE NAND QUAD 2INPUT 14SOIC
Manufacturer
NXP Semiconductors
Series
74HCr
Datasheet
1.74HC00D653.pdf
(16 pages)
Specifications of 74HC00D,653
Number Of Circuits
4
Package / Case
14-SOIC (3.9mm Width), 14-SOL
Logic Type
NAND Gate
Number Of Inputs
2
Current - Output High, Low
5.2mA, 5.2mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
NAND
Logic Family
HC
High Level Output Current
- 5.2 mA
Low Level Output Current
5.2 mA
Propagation Delay Time
7 ns
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-1379-2
74HC00D-T
933713360653
74HC00D-T
933713360653
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74HC00D,653
Manufacturer:
GGM
Quantity:
70
NXP Semiconductors
Fig 9.
74HC_HCT00
Product data sheet
SO14: plastic small outline package; 14 leads; body width 3.9 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
inches
UNIT
mm
Package outline SOT108-1 (SO14)
VERSION
OUTLINE
SOT108-1
0.069
max.
1.75
A
0.010
0.004
0.25
0.10
A
14
1
1
Z
pin 1 index
y
0.057
0.049
1.45
1.25
A
2
076E06
IEC
0.25
0.01
e
A
3
0.019
0.014
0.49
0.36
b
p
D
0.0100
0.0075
All information provided in this document is subject to legal disclaimers.
0.25
0.19
MS-012
JEDEC
c
REFERENCES
8.75
8.55
0.35
0.34
Rev. 5 — 25 November 2010
D
(1)
0
0.16
0.15
E
4.0
3.8
b
(1)
p
8
7
JEITA
scale
1.27
0.05
2.5
e
w
M
c
0.244
0.228
H
6.2
5.8
E
A
2
0.041
5 mm
1.05
A
L
1
0.039
0.016
1.0
0.4
L
p
74HC00; 74HCT00
H
E
E
detail X
0.028
0.024
0.7
0.6
Q
PROJECTION
L
L
EUROPEAN
0.25
0.01
p
Q
v
(A )
Quad 2-input NAND gate
3
A
0.25
0.01
w
θ
0.004
A
0.1
© NXP B.V. 2010. All rights reserved.
X
v
y
M
ISSUE DATE
99-12-27
03-02-19
A
0.028
0.012
Z
0.7
0.3
(1)
SOT108-1
θ
8
0
o
o
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