ep5352q Enpirion, ep5352q Datasheet

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ep5352q

Manufacturer Part Number
ep5352q
Description
500/600/800ma Synchronous Buck Regulators With Integrated Inductor
Manufacturer
Enpirion
Datasheet
Product Highlights
• Revolutionary integrated inductor
• Very small solution foot print*
• Fully RoHS compliant; MSL 3 260°C reflow
• Only two low cost components required
• 5mm x 4mm x1.1mm QFN package
• Wide 2.4V to 5.5V input range
• 500, 600, 800 mA output current versions
• Less than 1 µA standby current
• 4 MHz switching frequency
• Fast transient response
• Very low ripple voltage; 5mV
• 3 Pin VID Output Voltage select
• External divider option
• Dynamically adjustable output
• Designed for Low noise/EMI
• Short circuit, UVLO, and thermal protection
*Optimized PCB Layout file downloadable from the Enpirion Website to assure first pass design success
ENABLE
Thermal Limit
Current Limit
Soft Start
UVLO
(+)
(-)
Generator
Sawtooth
PWM
Comp
Logic
VREF
Compensation
Network
Error
Amp
(-)
(+)
P-Drive
N-Drive
DAC
p-p
VS0 VS1 VS2
Voltage
Switch
Select
V
IN
typical
Package Boundry
EP5352Q/EP5362Q/EP5382Q
500/600/800mA Synchronous Buck Regulators
V
GND
V
V
OUT
SENSE
FB
Product Overview
The Ultra-Low-Profile EP53X2Q product family is
targeted to applications where board area and
profile are critical. EP53X2Q is a complete power
conversion solution requiring only two low cost
ceramic MLCC caps.
PWM, and compensation are integrated into a
tiny 5mm x 4mm x 1.1mm QFN package. The
EP53x2Q family is engineered to simplify design
and to minimize layout constraints.
switching
compensation
response. With a 1.1 mm profile, the EP53x2 is
perfect for space and height limited applications.
A 3-pin VID output voltage select scheme
provides seven pre-programmed output voltages
along with an option for external resistor divider.
Output voltage can be programmed on-the-fly to
provide fast, dynamic voltage scaling.
Typical Application Circuit
Figure 1. Typical application circuit.
Applications
• Area constrained applications
• Mobile multimedia, smartphone & PDA
• Mobile and Cellular platforms
• VoIP and Video phones
• Personal Media Players
• FPGA, DSP, IO & Peripherals
V
IN
Voltage
2.2uF
Select
frequency
provides
V
V
V
ENABLE
V
With Integrated Inductor
S0
S1
S2
in
GND
and
Inductor, MOSFETS,
V
Sense
V
V
superior
out
FB
internal
RoHS Compliant
10µF
V
March 2007
transient
type
OUT
High
III

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ep5352q Summary of contents

Page 1

... External divider option • Dynamically adjustable output • Designed for Low noise/EMI • Short circuit, UVLO, and thermal protection *Optimized PCB Layout file downloadable from the Enpirion Website to assure first pass design success EP5352Q/EP5362Q/EP5382Q 500/600/800mA Synchronous Buck Regulators V IN Product Overview ...

Page 2

... Thermal Characteristics PARAMETER Thermal Resistance: Junction to Ambient (0 LFM) Thermal Resistance: Junction to Case (0 LFM) Thermal Shutdown Thermal Shutdown Hysteresis Electrical Characteristics NOTE 25°C unless otherwise noted. Typical values are at VIN = 3.6V. A EP5352QI, EP5362QI 2.2µ EP5382QI 4.7µF, C =10uF. IN OUT PARAMETER SYMBOL Operating Input Voltage ...

Page 3

... OUT I Enable = Low SD No switching 2.4V ≤ V ≤ 5.5V LIM 0.6V ≤ V ≤ V – 0.6V OUT IN Pin = Low Pin = High I VSX Logic Low Logic High 3. OSC DS(ON) DS(ON) T Vout = 3. EP5382Q/EP5362Q/EP5352Q MIN TYP MAX UNITS -3.0 +3.0 -3.0 +3.0 % -3.0 +3.0 -3.0 +3.0 -3.0 +3.0 -3.0 +3.0 -3.0 +3.0 V 0.585 0.603 0.621 .05 %/V .0003 %/mA 3 mV/µS 500 mA 600 mA ...

Page 4

... ENABLE (Pin 20): Output enable. Enable = logic high, disable = logic low. Logic low is defined HIGH values is indeterminate. to the output Thermal Pad. Thermal pad to remove heat from package. Connect to surface ground pad and PCB internal ground plane. 4 EP5382Q/EP5362Q/EP5352Q V Thermal Pad ...

Page 5

... March 2007 Functional Block Diagram UVLO Thermal Limit Current Limit ENABLE Soft Start (-) PWM Comp (+) Sawtooth Generator Figure 4. Functional block diagram. ©Enpirion 2007 all rights reserved, E&OE EP5382Q/EP5362Q/EP5352Q P-Drive Logic N-Drive Compensation Network (-) Error Amp (+) DAC VREF VS0 VS1 VS2 ...

Page 6

... V = 3. 450 450 550 550 V V out out 50mV/Div 50mV/Div I I Load Load 500mA/Div 500mA/Div V V out out 10mV/Div 10mV/Div 6 EP5382Q/EP5362Q/EP5352Q Efficiency vs Output Current Efficiency vs Output Current 100 100 3.3V = 3.3V OUT OUT 3.0V = 3.0V OUT OUT 70 70 ...

Page 7

... If the over current condition still persists, this cycle will repeat in a “hiccup” mode. 7 EP5382Q/EP5362Q/EP5352Q Inductor ed the world’s first start circuits limit in-rush current ramp rate to levels that are safe for OUT low ...

Page 8

... External Voltage Divider As described above, the external voltage divider option is chosen by V S0, VS1, and VS2 pins logic “high”. IN The EP53x2Q uses a separate feedback pin when using the external divider. VSENSE FB must be connected to V Figure 5. 8 EP5382Q/EP5362Q/EP5352Q VS1 VS0 V OUT ...

Page 9

... Dynamic transitioning between internal VID settings and the external divider is not allowed. Input and Output Capacitors The input capacitance requirement is as follows: EP5352Q, EP5362Q = 2.2uF EP5382Q = 4.7uF Enpirion recommends that a low ESR MLCC capacitor be used. The input capacitor must use a X5R or X7R or equivalent dielectric © ...

Page 10

... Recommendation 6: As with any switch-mode DC/DC converter, do not run sensitive signal or control lines underneath the converter package. Figure 6 shows an example schematic for the EP53x2Q using the internal voltage select. In this example, the device is set ©Enpirion 2007 all rights reserved, E&OE of 1.2V (VS2=0, VS1=1, VS0=1). OUT 10 EP5382Q/EP5362Q/EP5352Q www.enpirion.com ...

Page 11

... E&OE VS2 VS1 NC 8 VS0 OUT 4.7uF/2.2uF 10µ VS2 VS1 NC 8 VS0 19 ENABLE OUT 4.7uF 10µF 11 EP5382Q/EP5362Q/EP5352Q V OUT Rb=60K Ra=200K V OUT www.enpirion.com ...

Page 12

... MO-220, Issue J, Date May 2005). The separation between the large thermal pad and the nearest adjacent metal pad or pin is a minimum of 0.20mm, including tolerances. This is shown in Figure 10. ©Enpirion 2007 all rights reserved, E&OE nd Plane lane lane 12 EP5382Q/EP5362Q/EP5352Q Package Package Outline Outline C C ...

Page 13

... PCB. JEDEC minimum separation = 0.20 JEDEC minimum separation = 0.20 Figure 10. Exposed pad clearances; the Enpirion lead frame package complies with JEDEC requirements. ©Enpirion 2007 all rights reserved, E&OE 0.25 0.25 0.25 0.25 0.20 0.20 0.20 0.20 0.20 0.20 13 EP5382Q/EP5362Q/EP5352Q Thermal Pad. Connect to Ground plane www.enpirion.com ...

Page 14

... March 2007 Figure 11. Recommended PCB Solder Mask Openings. ©Enpirion 2007 all rights reserved, E&OE EP5382Q/EP5362Q/EP5352Q 14 www.enpirion.com ...

Page 15

... March 2007 Figure 12. Package mechanical dimensions. ©Enpirion 2007 all rights reserved, E&OE P53x2 P53x2 XXXXX XXXXX YYWW YYWW 15 EP5382Q/EP5362Q/EP5352Q www.enpirion.com ...

Page 16

... March 2007 Tape & Reel Specification Figure 13. Tape and reel mechanical dimensions. Ordering Information Part Number EP5352QI-T 500mA EP5352QI-E 500mA EP5362QI-T 600mA EP5362QI-E 600mA EP5382QI-T 800mA EP5382QI-E 800mA Additional Products Part Number EQ5352DI EQ5362DI EQ5382DI EN5312QI EN5335QI EN5336QI EN5365QI EN5366QI ©Enpirion 2007 all rights reserved, E&OE ...

Page 17

... Enpirion assumes no responsibility for its use or for infringement of patents or other third party rights, which may result from its use. Enpirion products are not authorized for use in nuclear control systems, as critical components in life support systems or equipment used in hazardous environment without the express written authority from Enpirion. ©Enpirion 2007 all rights reserved, E&OE EP5382Q/EP5362Q/EP5352Q 17 www.enpirion.com ...

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