sip12202 Vishay, sip12202 Datasheet - Page 8

• Manufacturer Part Number: sip12202
• Description: Synchronous Step Down Controller
• Manufacturer: Vishay

SiP12202
Vishay Siliconix
APPLICATION NOTES
Inductor Selection:
An inductor is one of the energy storage component in a
converter. Choosing an inductor means specifying its
size, structure, material, inductance, saturation level,
dc-resistance (DR.), and core loss. Fortunately, there
are many inductor vendors that offer wide selections
with ample specifications and test data, such as Vishay
Dale.
The following are some key parameters that users
should focus on. In PWM mode, inductance has a direct
impact on the ripple current. The peak-to-peak inductor
ripple current can be calculated as
where f = switching frequency.
Higher inductance means lower ripple current, lower
current, lower voltage ripple on both input and output,
and higher efficiency, unless the resistive loss of the
inductor dominates the overall conduction loss. How-
ever, higher inductance also means a bigger inductor
size and a slower response to transients. In PSM mode,
inductance affects inductor peak current, and conse-
quently impacts the load capability and switching fre-
quency. For fixed line and load conditions, higher
inductance results in a lower peak current for each
pulse, a lower load capability, and a higher switching fre-
quency.
The saturation level is another important parameter in
choosing inductors. Note that the saturation levels spec-
ified in data sheets are maximum currents. For a dc-to-
dc converter operating in PWM mode, it is the maximum
peak inductor current that is relevant, and which can be
calculated using these equations:
This peak current varies with inductance tolerance and
other errors, and the rated saturation level varies over
temperature. So a sufficient design margin is required
when choosing current ratings.
A high-frequency core material, such as ferrite, should
be chosen, the core loss could lead to serious efficiency
penalties. The DCR should be kept as low as possible to
reduce conduction losses.
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P
−
P
I
PK
=
=
V
OUT
I
OUT
(
V
V
+
IN
IN
I
Lf
−
P
2
−
V
P
OUT
)
New Product
Input Capacitor Selection:
To minimize current pulse induced ripple caused by the
step-down controller and interference of large voltage
spikes from other circuits, a low-ESR input capacitor is
required to filter the input voltage. The input capacitor
should be rated for the maximum RMS input current:
It is common practice to rate for the worst-case RMS rip-
ple that occurs when the duty cycle is at 50%:
Output Capacitor Selection:
The selection of the output capacitor is primarily deter-
mined by the ESR required to minimize voltage ripple
and current ripple. The desired output ripple ΔV
be calculated by:
Current ripple can be calculated by:
Where: ΔV
f = switching frequency
I
I
T = Switching Period
Multiple capacitors placed in parallel may be needed to
meet the ESR requirements. However if the ESR is too
low it can cause instability.
MOSFET Selection:
The key selection criteria for the MOSFETs include max-
imum specifications for on-resistance, drain-source volt-
age, gate source, current, and total gate charge Qg.
While the voltage ratings are fairly straightforward, it is
important to carefully balance on-resistance and gate
charge. In typical MOSFETs, the lower the on-resis-
tance, the higher the gate charge. The power loss of a
MOSFET consists of conduction, gate charge, and
crossover losses. For lower-current application, gate
charge losses become a significant factor, so low gate
charge MOSFETs, such as Vishay Siliconix's LITTLE
FOOT family of PWM-optimized devices, are desirable.
max
min
= Minimum Inductor Current
= Maximum Inductor Current
Δ
I
(
V
OUT
RMS
I
m ax
OUT
=
I -
=
= Desired Output Ripple Voltage
I
m in
LOAD(m ax)
I
(
RMS
I
m ax
)
=
I -
=
T
L
m in
I
LOAD(max)
V
V
)
OUT
⎛
⎜
⎝
V
IN
V
2
ESR
OUT
IN
V (
S-52332–Rev. B, 07-Nov-05
⎛
⎜
⎝
IN
+
1
Document Number: 73542
−
-
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V
V
OUT
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OUT
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IN
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⎞
⎟
⎠
⎞
⎟
⎠
OUT
can