LMK03001D National Semiconductor Corporation, LMK03001D Datasheet - Page 20

• Manufacturer Part Number: LMK03001D
• Manufacturer: National Semiconductor Corporation

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2.8.2 VCO_DIV[3:0] -- VCO Divider
These bits program the divide value for the VCO Divider. The
VCO Divider follows the VCO output and precedes the clock
distribution blocks. Since the VCO Divider is in the feedback
path from the VCO to the PLL phase detector the VCO Divider
contributes to the total N divide value, N
Divider × VCO Divider. The VCO Divider can not be by-
passed. See the programming section on the PLL N Divider
for more information on setting the VCO frequency.
0
0
0
0
0
0
0
VCO_DIV[3:0]
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
Total
VCO Divider
. N
2 (default)
Invalid
Invalid
Value
Total
3
4
5
6
= PLL N
20
2.8.3 PLL_CP_GAIN[1:0] -- PLL Charge Pump Gain
These bits set the charge pump gain of the PLL.
0
1
1
1
.
PLL_CP_GAIN[1:0]
VCO_DIV[3:0]
1
0
0
1
0
1
2
3
.
1
0
0
1
.
1
0
1
1
.
Charge Pump Gain
1x (default)
16x
32x
VCO Divider
4x
Invalid
Invalid
Value
...
7
8