sm72295x National Semiconductor Corporation, sm72295x Datasheet - Page 5

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sm72295x

Manufacturer Part Number
sm72295x
Description
Photovoltaic Full Bridge Driver
Manufacturer
National Semiconductor Corporation
Datasheet
Symbol
LO & HO GATE DRIVER
V
V
I
I
t
t
t
t
t
t
t
t
t
CURRENT SENSE AMPLIFIER
V
Gain 5mV
Gain
50mV
Vclamp
CURRENT SENSE BUFFER
THERMAL RESISTANCE
θ
OHL
OLL
LPHL
LPLH
HPHL
HPLH
MON
MOFF
RC
PW
BS
JA
OL
OH
OS
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. 2 kV for all pins except HB, HO & HS which are rated
at 1000V.
Note 3: 2 layer board with 2 oz Cu using JEDEC JESD51 thermal board.
Note 4: Min and Max limits are 100% production tested at 25ºC. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5: In the application the HS nodes are clamped by the body diode of the external lower N-MOSFET, therefore the HS node will generally not exceed –1V.
However, in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently. If negative transients occur,
the HS voltage must never be more negative than VCC-15V. For example if VCC = 10V, the negative transients at HS must not exceed –5V.
, t
FC
Parameter
Low-Level Output Voltage
High-Level Output Voltage
Peak Pullup Current
Peak Pulldown Current
LO Turn-Off Propagation Delay LI Falling to LO Falling
LO Turn-On Propagation Delay LI Rising to LO Rising
HO Turn-Off Propagation
Delay
LO Turn-On Propagation Delay HI Rising to HO Rising
Delay Matching: LO on & HO
off
Delay Matching: LO off & HO
on
Either Output Rise/Fall Time
Minimum Input Pulse Width
that Changes the Output
Bootstrap Diode Turn-On or
Turn-Off Time
Offset voltage
Gain is programmed with
external resistors
IOUT, IIN =(RL/RSI )* (SI-SO)
Gain is programmed with
external resistors
IOUT, IIN =(RL/RSI )* (SI-SO)
Output Clamp
Offset voltage (BIN-IIN),
(BOUT-IOUT)
Output low voltage BOUT,BIN IIN, IOUT = 0
Output high voltage BOUT,BIN IIN, IOUT = VDD
Junction to Ambient
Conditions
I
V
I
V
HO, LO = 12V
HO, LO = 0V
HI Falling to HO Falling
C
I
R
resistor voltage
5mV sense resistor voltage
R
50mV sense resistor voltage
R
0.1V sense resistor voltage
R
IIN = 2.5V
SOIC-28
LO
LO
F
OL
OH
L
SI
SI
SI
SI
= 100mA/ I
= 1000pF
= 100mA
= -100mA
= R
= R
= R
= R
= LO-PGND or HO-HS
= VCC-LO or VCC-HO
SO
SO
SO
SO
(Note
= 500, 10mV sense
= 1000, R
= 1000, R
= 1000, R
R
= 100mA
3)
L
L
L
5
= 75K
= 75K
= 75K
VDD-100mV
Min
-60
-2
0
VDD-30mV
VDD
0.16
0.28
3.85
Typ
390
22
26
22
26
50
37
60
3
3
1
1
8
VDD
Max
0.4
0.6
60
50
2
www.national.com
Units
°C/W
mV
mV
mV
mV
mV
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
A
A
V
V

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