ia186xl Innovasic Semiconductor Inc., ia186xl Datasheet - Page 27

• Manufacturer Part Number: ia186xl
• Description: 16-bit Microcontroller
• Manufacturer: Innovasic Semiconductor Inc.

IA186XL/IA188XL
16-Bit Microcontrollers
Table 7. IA186XL Pin/Signal Descriptions (Continued)
lcs_n
lock_n
mcs0_n
mcs1_n
mcs2_n
mcs3_n
n.c.
nmi
nps_n
pcs0_n
pcs1_n
pcs2_n
pcs3_n
pcs4_n
pcs5_n
pcs6_n
pereq
qs0
qs1
qsmd_n
Signal
mcs1_n/error_n
mcs3_n/nps_n
mcs3_n/nps_n
mcs0_n/pereq
mcs0_n/pereq
rd_n/qsmd_n
pcs5_n/a1
pcs6_n/a2
wr_n/qs1
mcs2_n
pcs0_n
pcs1_n
pcs2_n
pcs3_n
pcs4_n
ale/qs0
lock_n
Name
lcs_n
n.c.
nmi
®
PLCC
NA
33
48
38
37
36
35
46
35
25
27
28
29
30
31
32
38
61
63
62
Pin
UNCONTROLLED WHEN PRINTED OR COPIED
14, 15,
24, 43,
44, 62,
PQFP
2, 11,
46
28
39
40
41
42
63
30
42
54
52
51
50
49
48
47
39
10
8
9
ENG211080711-01
Page 27 of 72
35, 55,
LQFP
4, 25,
63
45
57
58
59
60
72
47
60
71
69
68
67
66
65
64
57
29
27
28
lower chip select. Output. Active Low. This
pin provides a chip select signal that will be
asserted (low) whenever the address of a
memory bus cycle is within the address space
programmed for that output.
lock. Output. Active Low. When asserted
(low), this signal indicates that the bus cycle in
progress is cannot be interrupted. While
lock_n is active, the IA186XL will not service
bus requests such as HOLD.
When resin_n is active, this pin is weakly held
high and must not be driven low.
mid-range memory chip select.
not connected.
non-maskable interrupt. Input. Active High.
When the nmi signal is asserted (high) it
causes a Type 2 interrupt.
numeric processor select
peripheral chip select signals 0–6.
numerics coprocessor external request.
Input. Active High. When asserted (high), this
signal indicates that a data transfer between
an Intel 80C187 Numerics Coprocessor and
memory is pending.
queue status 0, queue status 1
queue status mode
Description
Preliminary Data Sheet
September 30, 2008
http://www.Innovasic.com
Customer Support:
1-888-824-4184