LMV841MG National Semiconductor Corporation, LMV841MG Datasheet - Page 12

• Manufacturer Part Number: LMV841MG
• Description: The ADC14V155 is a high-performance CMOS analog-to-digital converter with LVDS outputs. It is capable of converting analog input signals into 14-Bit digital words at rates up to 155 Mega Samples Per Second (MSPS). Data leaves the chip in a DDR (Dual
• Manufacturer: National Semiconductor Corporation

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Application Information
INTRODUCTION
The LMV841 and LMV844 are operational amplifiers with
near-precision specifications: low noise, low temperature
drift, low offset and rail-to-rail input and output.
The low supply current, a temperature range of −40°C to
125°C, the 12V supply with CMOS input and the small SC70
package make this a unique op amp family.
Possible applications are instrumentation, medical, test
equipment, audio and automotive applications.
The small SC70 package for the LMV841, and the low supply
current per amplifier, 1 mA, make the LMV841/LMV844 per-
fect choices for portable electronics.
INPUT PROTECTION
The LMV841/LMV844 have a set of anti-parallel diodes D
and D
diodes are present to protect the input stage of the amplifier.
At the same time, they limit the amount of differential input
voltage that is allowed on the input pins.
A differential signal larger than one diode voltage drop can
damage the diodes. The differential signal between the inputs
needs to be limited to ±300 mV or the input current needs to
be limited to ±10 mA.
Note that when the op amp is slewing, a differential input volt-
age exists that forward biases the protection diodes. This may
result in current being drawn from the signal source. While
this current is already limited by the internal resistors R
R
back path, or a 500Ω resistor can be placed in series with the
input signal for further limitation.
INPUT STAGE
The input stage of this amplifier consists of a PMOS and an
NMOS input pair to achieve a more than rail-to-rail input
range.
For input voltages close to the negative rail, only the PMOS
pair is active. Close to the positive rail, only the NMOS pair is
active.
For intermediate signals, the transition from PMOS pair to
NMOS pair will result in a very small offset shift, which ap-
pears at approximately 1V from the positive rail.
2
FIGURE 1. Protection Diodes between the Input Pins
(both 130Ω), a resistor of 1 kΩ can be placed in the feed-
2
between the input pins, as shown in Figure 1. These
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1
and
1
12
To reduce this small offset shift, the amplifier is trimmed dur-
ing production, resulting in an input offset voltage of less then
0.5 mV at room temperature over the total input range.
CAPACITIVE LOAD
The LMV841/LMV844 can be connected as non-inverting uni-
ty-gain amplifiers. This configuration is the most sensitive to
capacitive loading.
The combination of a capacitive load placed on the output of
an amplifier along with the amplifier’s output impedance cre-
ates a phase lag, which reduces the phase margin of the
amplifier. If the phase margin is significantly reduced, the re-
sponse will be underdamped which causes peaking in the
transfer and when there is too much peaking the op amp might
start oscillating.
In order to drive heavier capacitive loads, an isolation resistor,
R
isolation resistor, the capacitive load is isolated from the
amplifier’s output, and hence, the pole caused by C
longer in the feedback loop. The larger the value of R
more stable the output voltage will be. If values of R
sufficiently large, the feedback loop will be stable, indepen-
dent of the value of C
in reduced output swing and reduced output current drive.
REDUCING OVERSHOOT
When the output of the op amp is at its lower swing limit (i.e.
saturated near V
overshoot.
This overshoot can be reduced by adding a resistor from the
output to V
a 10k resistor is sufficient to reduce the overshoot to negligible
levels.
The resistor at the output will however reduce the maximum
output swing, as would any resistive load at the output.
DECOUPLING AND LAYOUT
Care must be given when creating the board layout for the op
amp.
For decoupling the supply lines it is suggested that 10 nF ca-
pacitors be placed as close as possible to the op amp.
For single supply, place a capacitor between V
dual supplies, place one capacitor between V
ground, and the second capacitor between ground and V
NOISE DUE TO RESISTORS
The LMV841/LMV844 have good noise specifications, and
will frequently be used in low-noise applications. Therefore it
is important to take into account the influence of the resistors
on the total noise contribution.
For applications with a voltage input configuration it is, in gen-
eral, beneficial to keep the resistor values low. In these con-
figurations high resistor values mean high noise levels.
ISO
, should be used, as shown in Figure 2. By using this
FIGURE 2. Isolating Capacitive Load
+
. Even in extreme situations at high temperatures,
−
), rapidly rising signals can cause some
L
. However, larger values of R
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+
and the board
+
and V
ISO
ISO
L
ISO
−
result
is no
. For
, the
are
−
.