73k222al ETC-unknow, 73k222al Datasheet
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73k222al
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73k222al Summary of contents
Page 1
... In Bell 212A mode, the 73K222AL provides the normal Bell 212A and 103 functions and employs a 2225 Hz answer tone. The 73K222AL in V.22 mode produces either 550 or 1800 Hz guard tone, recognizes and generates a 2100 Hz answer tone, and allows 600 bit/s V. -300 bit/s V ...
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... An ALE control line simplifies address demultiplexing. Data communications occurs through a separate serial port only. The 73K222AL is ideal for use in either free standing or integral system modem products where full-duplex 1200 bit/s data communications over the 2-wire switched telephone network is desired ...
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... Hz carrier (originate mode or ALB answer mode). The 73K222AL uses a phase locked loop coherent demodulation technique for performance. FSK MODULATOR/DEMODULATOR The FSK modulator produces a frequency modulated analog output signal using two discrete frequencies to represent the binary data. In Bell 103, the standard ...
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... I Read. A low requests a read of the 73K222AL internal registers. Data cannot be output unless both RD and the latched CS are active or low. I Reset. An active high signal on this pin will put the chip into an inactive state ...
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... Read data is provided LSB first. Data will not be output unless the RD signal is active. I Write. A low on this input informs the 73K222AL that data or status information has been shifted in through the DATA pin and is available for writing to an internal register. The normal procedure for a write is to shift in data LSB first on the DATA pin for eight consecutive falling edges of EXCLK and then to pulse WR low ...
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... V.22, V.21, Bell 212A, 103 Single-Chip PIN DESCRIPTION (continued) DTE USER NAME 28-PIN TYPE EXCLK 19 RXCLK 23 RXD 22 Weak Pull -up TXCLK 18 TXD 21 ANALOG INTERFACE AND OSCILLATOR RXA 27 TXA 16 XTL1 2 XTL2 3 DESCRIPTION External Clock. This signal is used in synchronous transmission I when the external timing option has been selected. In the external timing mode the rising edge of EXCLK is used to strobe synchronous DPSK transmit data applied to on the TXD pin ...
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... X = Undefined, mask in software V.22, V.21, Bell 212A, 103 73K222AL internal state detect register which provides an indication of monitored modem status conditions. TR, the tone control register, controls the DTMF generator, answer and guard tones and RXD output gate used in ...
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... OUTPUT REGISTER CONTROL RXD PIN 0 = NORMAL 1 = TRI STATE 110 REGISTER 00XX = 73K212AL, 322L, 321L X = Undefined, mask in software 01XX = 73K221AL, 302L 10XX = 73K222AL, 222BL 1100 = 73K224L 1110 = 73K324L 1111 = 73K224BL 1101 = 73K324BL DATA BIT NUMBER TRANSMIT TRANSMIT TRANSMIT 0 MODE MODE ...
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... Selects PSK asynchronous mode - 11 bits/character (1 start bit, 8 data bits, Parity and stop bits Selects FSK operation. 0 Not used; must be written as a “0.” 9 73K222AL Single-Chip Modem D2 D1 TRANSMIT TRANSMIT ANSWER/ MODE 0 ENABLE ORIGINATE D0 ...
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... V.22, V.21, Bell 212A, 103 Single-Chip CONTROL REGISTER 0 (continued CR0 MODUL. 0 TRANSMIT 000 OPTION MODE 3 BIT NO. NAME D7 Modulation Option CONTROL REGISTER CR1 TRANSMIT TRANSMIT 001 PATTERN PATTERN 1 0 BIT NO. NAME D1, D0 Test Mode D2 Reset D3 CLK Control (Clock Control TRANSMIT ...
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... Indicates normal received signal. 1 Indicates low received signal level call progress tone detected. 1 Indicates presence of call progress tones. The call progress detection circuitry is activated by energy in the 350 to 620 Hz call progress band. 11 73K222AL Single-Chip Modem RESET TEST TEST MODE MODE ...
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... V.22, V.21, Bell 212A, 103 Single-Chip DETECT REGISTER (continued 010 BIT NO. NAME D2 Answer Tone Detect D3 Carrier Detect D4 Unscrambled Mark Detect D5 Receive Data D6, D7 Not Used TONE REGISTER D7 D6 RXD TRANSMIT TR OUTPUT GUARD 011 CONTR. TONE BIT NO. NAME D0 DTMF 0/ Answer/ Guard Tone ...
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... Enables answer tone generator. A 2225 Hz answer tone will be transmitted continuously when the Transmit Enable bit is set in CR0. The device must be in answer mode Likewise a 2100 Hz answer tone will be transmitted. 13 73K222AL Single-Chip Modem DTMF 2 DTMF 1/ DTMF 0/ OVER- ANSWER/ SPEED ...
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... CONDITION DESCRIPTION Indicates Device 73K212AL, 73K321L, 73K322L 73K221AL or 73K302L 73K222AL, 73K222BL 73K224L 73K324L 73K224BL 73K324BL Undefined Mask in software ...
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... C 260 C -0.3 to VDD + 0.3V CONDITION (11.0592 MHz) Crystal or external clock (External to GND) (Placed between VDD and ISET pins) (ISET pin to GND) (External to GND) (External to GND) Depends on crystal characteristics; from pin to GND 15 73K222AL Single-Chip Modem MIN NOM MAX UNIT 4.5 5 5.5 V -40 +85 -0.01 +0.01 % 0.1 µ ...
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... V.22, V.21, Bell 212A, 103 Single-Chip ELECTRICAL SPECIFICATIONS DC ELECTRICAL CHARACTERISTICS ( VDD = recommended range unless otherwise noted.) PARAMETER IDD, Supply Current IDDA, Active IDD1, Power-down IDD2, Power-down Digital Inputs VIH, Input High Voltage Reset, XTL1, XTL2 All other inputs VIL, Input Low Voltage ...
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... Random Input in ALB @ RXD Low Band, DPSK Mode High Band, DPSK Mode High-Band to Low-Band, DPSK Mode DPSK or FSK Refer to Performance Curves 2-Tones in 350-600 Hz band 2-Tones in 350-600 Hz band -70 dBm0 to -30 dBm0 STEP -30 dBm0 to -70 dBm0 STEP 17 73K222AL Single-Chip Modem MIN NOM MAX UNIT 55 dB -11.5 -10.0 -9 dBm0 -0 ...
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... V.22, V.21, Bell 212A, 103 Single-Chip DYNAMIC CHARACTERISTICS AND TIMING PARAMETER Carrier Detect Threshold Delay Time Hysteresis Hold Time Answer Tone Detector Detect Level Delay Time Hold Time Detect Frequency Range Output Smoothing Filter Output load Spurious Frequency Comp. TXA pin Output Impedance ...
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... Data setup before WR High Data hold after WR High Data out after EXCLK Low WR after EXCLK Low Data setup before EXCLK Low Address setup before control* Address hold after control* Data Hold after EXCLK 19 73K222AL Single-Chip Modem MIN NOM MAX UNIT -20 + ...
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... V.22, V.21, Bell 212A, 103 Single-Chip TIMING DIAGRAMS BUS TIMING DIAGRAM (PARALLEL VERSION) TLL ALE TLC RD WR TLA TAL AD0-AD7 ADDRESS CS READ TIMING DIAGRAM (SERIAL VERSION) EXCLK RD TAC TCA AD0-AD2 ADDRESS TRD AD7 D0 WRITE TIMING DIAGRAM (SERIAL VERSION) EXCLK WR AD0-AD2 TDCK AD7 ...
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... RXA K-SERIES C6 LOW 0.1 µF C2 POWER 300 pF RXA FAMILY 1000 pF R7 43.2K TXA 0.1 µF 20K - TXA LM 1458 + U1B +5V V– C12 1 µF 21 73K222AL V.22, V.21, Bell 212A, 103 Single-Chip Modem version can be used C1 390 pF R5 37.4K R4 20K - LM 1458 + U1A R4 5. 3.6K T1 MIDCOM 671-8005 R1 475 0.47 µ ...
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... V.22, V.21, Bell 212A, 103 Single-Chip DIRECT ACCESS ARRANGEMENT (DAA) The telephone line interfaces show two examples of how the “hybrid” may be implemented. The split supply design (Figure typical two op-amp hybrid. The receive op-amp serves two purposes. It supplies gain to amplify the receive signal to the proper level for the modem’ ...
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... K-Series device ground pin to avoid ground loops. The K-Series modem IC’s should have both high frequency and low frequency bypassing as close to the package as possible. V.22, V.21, Bell 212A, 103 USING THE SERIAL MODE ON THE 73K222AL A sensitivity to specific patterns being written to signals, to ensure ...
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... V.22, V.21, Bell 212A, 103 Single-Chip pattern was used for each data point. C-message weighted and all signal-to-noise (S/N) ratios reflect total power measurements similar to the CCITT V.56 measurement specification. The individual tests are defined as follows. BER vs. S/N This test measures the ability of the modem to operate over noisy lines with a minimum of data-transfer errors ...
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... BER vs CARRIER OFFSET -2 10 HIGH BAND RECEIVE DPSK OPERATION - 3002 11.8 dB S/N C2 11 CARRIER OFFSET (HZ) *73K222AL BER vs PHASE JITTER -2 10 HIGH BAND RECEIVE DPSK OPERATION 3002 11 10 PHASE JITTER ( PEAK) ...
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... V.22, V.21, Bell 212A, 103 Single-Chip MECHANICAL SPECIFICATIONS 28-Pin DIP 28-Pin PLCC 26 ...
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... MECHANICAL SPECIFICATIONS 44-Lead TQFP V.22, V.21, Bell 212A, 103 (continued) 27 73K222AL Single-Chip Modem ...
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... DIP 73K222AL-IP ORDERING INFORMATION PART DESCRIPTION 73K222AL with Parallel Bus Interface 28-Pin Plastic Dual In-Line 28-Pin Plastic Leaded Chip Carrier 44-Pin Thin Quad Flat Pack No responsibility is assumed by TDK Semiconductor Corporation for use of this product nor for any infringements of patents and trademarks or other rights of third parties resulting from its use ...