ml7074a-004 Oki Semiconductor, ml7074a-004 Datasheet - Page 4

• Manufacturer Part Number: ml7074a-004
• Description: Voip Codec
• Manufacturer: Oki Semiconductor

PIN DESCRIPTIONS
OKI Semiconductor
No.
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
1
2
3
4
5
6
7
8
9
(DMARQ0B)
(DMARQ1B)
DGND0
Symbol
ACK0B
ACK1B
PCMO
DV
SYNC
PCMI
BCLK
FR0B
FR1B
TST1
TST0
INTB
WRB
CSB
RDB
D10
D11
D12
D13
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
DD
0
I/O PDNB = “0”
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O


O
O
O
O
I
I
I
I
I
I
I
I
“Hi-z”
“H”
“H”
“H”
“0”
“0”
“L”
“L”

I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
PCM data output
PCM data input
CLKSEL = “0”
CLKSEL = “1”
CLKSEL = “0”
CLKSEL = “1”
Digital power supply
Transmit buffer DMA access acknowledge signal input
Receive buffer DMA access acknowledge signal input
FR0B: (CR11-B7 = “0”)
DMARQ0B: (CR11-B7 = “1”)
FR1B: (CR11-B7 = “0”)
DMARQ1B: (CR11-B7 = “1”)
Interrupt request output
“L” level is output for about 1.0 µs when an interrupt is generated.
Chip select control input
Read control input
Write control input
Digital ground (0.0 V)
Data input/output
Data input/output
Data input/output
Data input/output
Data input/output
Data input/output
Data input/output
Data input/output
Data input/output
Fix to input state when using in 8-bit bus access (CR11-B5 = “1”).
Data input/output
Fix to input state when using in 8-bit bus access (CR11-B5 = “1”).
Data input/output
Fix to input state when using in 8-bit bus access (CR11-B5 = “1”).
Data input/output
Fix to input state when using in 8-bit bus access (CR11-B5 = “1”).
Data input/output
Fix to input state when using in 8-bit bus access (CR11-B5 = “1”).
Data input/output
Fix to input state when using in 8-bit bus access (CR11-B5 = “1”).
Data input/output
Fix to input state when using in 8-bit bus access (CR11-B5 = “1”).
Data input/output
Fix to input state when using in 8-bit bus access (CR11-B5 = “1”).
Test control input 1: Normally input “0”.
Test control input 0: Normally input “0”.
PCM shift clock input
PCM shift clock output
PCM sync signal 8 kHz input
PCM sync signal 8 kHz output
Transmit buffer frame signal output
Transmit buffer DMA access request signal output
Receive buffer frame signal output
Receive buffer DMA access request signal output
Description
FEDL7074-003DIGEST-01
ML7074-004GA
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