mt8888csr1 Zarlink Semiconductor, mt8888csr1 Datasheet

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mt8888csr1

Manufacturer Part Number
mt8888csr1
Description
Integrated Dtmf Transceiver With Intel Micro Interface
Manufacturer
Zarlink Semiconductor
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
MT8888CSR1
Manufacturer:
ZARLINK
Quantity:
427
Features
Applications
Description
The MT8888C is a monolithic DTMF transceiver with
call progress filter. It is fabricated in CMOS technology
offering low power consumption and high reliability.
TONE
OSC1
OSC2
Central office quality DTMF transmitter/receiver
Low power consumption
High speed Intel micro interface
Adjustable guard time
Automatic tone burst mode
Call progress tone detection to -30 dBm
Credit card systems
Paging systems
Repeater systems/mobile radio
Interconnect dialers
Personal computers
IN+
GS
IN-
V
+
-
DD
Oscillator
Circuit
Circuit
V
Bias
Tone Burst
Gating Cct.
Ref
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Tone
Filter
Dial
V
SS
Copyright 2003-2005, Zarlink Semiconductor Inc. All Rights Reserved.
Converters
High Group
Low Group
D/A
Control
Filter
Filter
Logic
Control
Logic
Figure 1 - Functional Block Diagram
Zarlink Semiconductor Inc.
ESt
Row and
Counters
Column
and Code
Converter
Algorithm
Digital
Steering
Logic
St/GT
1
The receiver section is based upon the industry
standard MT8870 DTMF receiver while the transmitter
utilizes a switched capacitor D/A converter for low
distortion, high accuracy DTMF signalling. Internal
counters provide a burst mode such that tone bursts
can be transmitted with precise timing. A call progress
filter can be selected allowing a microprocessor to
analyze call progress tones.
The MT8888C utilizes an Intel micro interface, which
allows the device to be connected to a number of
popular microcontrollers with minimal external logic.
Transmit Data
Receive Data
MT8888CE
MT8888CS
MT8888CN
MT8888CP
MT8888CE1
MT8888CS1
MT8888CN1
MT8888CP1
MT8888CPR
MT8888CSR
MT8888CSR1
MT8888CPR1
Register
Register
Register
Register
Register
Status
Control
Control
Integrated DTMF Transceiver
A
B
Ordering Information
with Intel Micro Interface
*Pb Free Matte Tin
-40°C to +85°C
20 Pin PDIP
20 Pin SOIC
24 Pin SSOP
28 Pin PLCC
20 Pin PDIP*
20 Pin SOIC*
24 Pin SSOP*
28 Pin PLCC*
28 Pin PLCC
20 Pin SOIC
20 Pin SOIC*
28 Pin PLCC*
Buffer
Control
Interrupt
Data
Bus
Logic
I/O
Tubes
Tubes
Tubes
Tubes
Tubes
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Tape & Reel
Tape & Reel
MT8888C
Data Sheet
September 2005
D0
D1
D2
D3
IRQ/CP
RD
CS
WR
RS0

Related parts for mt8888csr1

mt8888csr1 Summary of contents

Page 1

... MT8888CE1 MT8888CS1 MT8888CN1 MT8888CP1 MT8888CPR MT8888CSR MT8888CSR1 MT8888CPR1 The receiver section is based upon the industry standard MT8870 DTMF receiver while the transmitter utilizes a switched capacitor D/A converter for low distortion, high accuracy DTMF signalling. Internal counters provide a burst mode such that tone bursts can be transmitted with precise timing ...

Page 2

... D1 18 OSC2 TONE 15 10 IRQ/ RS0 24 PIN SSOP Figure 2 - Pin Connections Description /2 Zarlink Semiconductor Inc. Data Sheet • VRef VSS OSC1 OSC2 ...

Page 3

... The outputs of the comparators provide full rail logic swings at the frequencies of the incoming DTMF signals. MT8888C Description frees the device to accept a new tone pair. TSt /2. Provision is made for connection of a feedback resistor to the op Zarlink Semiconductor Inc. Data Sheet TSt ...

Page 4

... R2 R3 DIFFERENTIAL INPUT AMPLIFIER 100 kΩ 60kΩ 37.5 kΩ (R2R5)/(R2 + R5) VOLTAGE GAIN (A diff) - R5/R1 V INPUT IMPEDANCE diff (1/ωC) IN Figure 4 - Differential Input Configuration 4 Zarlink Semiconductor Inc. Data Sheet IN+ IN Ref MT8888C IN+ IN Ref MT8888C ...

Page 5

... 1633 1633 1633 reaches the threshold (V GTP continues to drive high as long as ESt remains high. Finally, after Zarlink Semiconductor Inc. Data Sheet ...

Page 6

... GTP DD Figure 5 - Basic Steering Circuit ≥ REC DPmax GTPmax DAmin ≤ REC DPmin GTPmin DAmax ≥ DAmax GTAmax DPmin ≤ DAmin GTAmin DPmax 6 Zarlink Semiconductor Inc. Data Sheet ) TSt - TSt ...

Page 7

... C1 GTA (R1R2) / ( decreasing tGTA; (tGTP > tGTA) Figure 6 - Guard Time Adjustment The call progress tone input and DTMF input are common, 7 Zarlink Semiconductor Inc. Data Sheet -V )] TSt /V ) TSt -V )] TSt /V ) TSt is the minimum signal duration REC GTP ...

Page 8

... REC ID TONE TONE # GTP t GTA t PStRX # n t PStb3 Figure 7 - Receiver Timing Diagram 0 250 500 FREQUENCY (Hz) = Reject = May Accept = Accept Figure 8 - Call Progress Response 8 Zarlink Semiconductor Inc. Data Sheet TONE # TSt # ( 750 ...

Page 9

... The divider output clocks another counter, which addresses the sinewave lookup ROM. MT8888C Figure 9 - Description of Timing Events and f LOW 9 Zarlink Semiconductor Inc. Data Sheet ) are referred to as Low Group and HIGH ...

Page 10

... MT8888C Scaling Information 10 dB/Div Start Frequency = 0 Hz Stop Frequency = 3400 Hz Marker Frequency = 697 Hz and 1209 Hz Figure 10 - Spectrum Plot 10 Zarlink Semiconductor Inc. Data Sheet ...

Page 11

... The total the sum of all the intermodulation components. The IMD .... IMD Zarlink Semiconductor Inc. Data Sheet %ERROR +0.30 -0.49 -0.54 +0.74 +0.57 -0.32 -0.35 +0.73 and V correspond to the low group H ...

Page 12

... Alternatively, this pin can be configured to provide a squarewave output of the call progress signal. The IRQ/CP pin is an open drain output and requires an external pull-up resistor (see Figure 15). MT8888C MT8888C MT8888C OSC1 OSC2 Figure 13 - Common Crystal Connection 12 Zarlink Semiconductor Inc. Data Sheet MT8888C OSC1 OSC2 ...

Page 13

... Write to Transmit Data Register 0 Read from Receive Data Register 1 Write to Control Register 0 Read from Status Register Table 3 - Internal Register Functions b2 b1 IRQ CP/DTMF Table 4 - CRA Bit Positions b2 b1 S/D TEST Table 5 - CRB Bit Positions DESCRIPTION 13 Zarlink Semiconductor Inc. Data Sheet b0 TOUT b0 BURST ENABLE ...

Page 14

... Valid data is in the Receive Data Register. Set upon the valid detection of the absence of a DTMF signal. 14 Zarlink Semiconductor Inc. Data Sheet STATUS FLAG CLEARED Interrupt is inactive. Cleared after Status Register is read. Cleared after Status Register is read or when in non-burst mode. ...

Page 15

... Microprocessor based systems can inject undesirable noise into the supply rails. The performance of the MT8888C can be optimized by keeping noise on the supply rails to a minimum. The decoupling capacitor (C3) should be connected close to the device and ground loops should be avoided. 15 Zarlink Semiconductor Inc. Data Sheet ...

Page 16

... Figure 17 - Application Notes 16 Zarlink Semiconductor Inc. Data Sheet 5.0 VDC 3 kΩ 100 pF Test load for IRQ/CP pin Data ...

Page 17

... ILO V 2.2 2.3 TSt V OLO V 4.9 OHO 2.4 2.5 Ref -1.4 -6 2.0 4 Zarlink Semiconductor Inc. Data Sheet Min. Max. Units 6 V -0 -65 +150 1000 ) unless otherwise stated. SS Max. Units Test Conditions 5.25 V °C +85 MHz Units Test Conditions Note 9* 1.5 V Note 9* 2 ...

Page 18

... 100 1 † - Voltages are with respect to ground (V ‡ Sym. Min. Typ. Max. -29 +1 27.5 869 18 Zarlink Semiconductor Inc. Data Sheet Units Test Conditions mA V =4. =0. =0.4V OL Units Test Conditions ≤ V ≤ MΩ ...

Page 19

... LR f 540 HR -30 Typical DTMF tone accept and reject requirements. Actual values are ‡ Sym. Min. Typ REC t 20 REC Zarlink Semiconductor Inc. Data Sheet =3.579545 MHz C Units Notes* dB 2,3,6,9 dB 2,3,6,9 2,3,5 2,3,5 dB 2,3,4,5,9,10 dB 2,3,4,5,7,9,10 dB 2,3,4,5,8,9 ), unless otherwise stated. SS Max. Units Conditions ...

Page 20

... DHR t 100 DDR t 150 PWL t 100 PWH t 45 DSW t 10 DHW Zarlink Semiconductor Inc. Data Sheet Units Conditions ms Note 11 ms Note 11 µs See Figure 7 µs See Figure 7 ms DTMF mode ms DTMF mode ms Call Progress mode ms Call Progress mode dBm R =10kΩ ...

Page 21

... Voltages are with respect to ground (V ‡ Sym. Min. Typ OUT t CYC PWH Figure 18 - RD/WR Clock Pulse t PWL DHR DDR t PWL DSW DHW 21 Zarlink Semiconductor Inc. Data Sheet ), unless otherwise SS Max. Units Conditions pF t PWL t PWH t PWH ...

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Page 25

... For more information about all Zarlink products Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use ...

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