le5711 Zarlink Semiconductor, le5711 Datasheet - Page 5

• Manufacturer Part Number: le5711
• Description: Dual Subscriber Line Interface Circuit
• Manufacturer: Zarlink Semiconductor

PIN DESCRIPTIONS
AGND/DGND
Exposed Pad
Pin Name
B
B
A
A
BGND
BGND
1
2
RSVD
RSVD
CDC
CDC
TMG
TMG
DET
DET
RSN
RSN
VBAT
1
2
IREF
VTX
VTX
CAS
DAC
VCC
DB
DB
HP
HP
(RING)
(RING)
C2
C1
C2
C1
NC
(TIP)
(TIP)
1
1
2
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
Capacitor
Capacitor
Capacitor
Capacitor
Capacitor
Resistor
Ground
Ground
Ground
Battery
Battery
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Power
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
—
Output of A (TIP) power amplifier of channel 1.
Output of A (TIP) power amplifier of channel 2.
Analog and digital ground.
Output of B (RING) power amplifier of channel 1.
Output of B (RING) power amplifier of channel 2.
Battery (power) ground of channel 1
Battery (power) ground of channel 2.
State decoder inputs of channel 1.
State decoder inputs of channel 2.
Pin for capacitor to filter reference voltage when operating in anti-saturation region.
DC feed filter capacitor of channel 1.
DC feed filter capacitor of channel 2.
Reserved. Connect to V
Reserved. Connect to V
Ring-trip negative of both channels. Negative input to ring-trip comparator.
Ring-trip positive of channel 1. Positive input to ring-trip comparator.
Ring-trip positive of channel 2. Positive input to ring-trip comparator.
Switch-hook/Ring-trip detector output of channel1. Logic low indicates that a detector is
tripped.
Switch-hook/Ring-trip detector output of channel 2. Logic low indicates that a detector is
tripped.
Connect High-pass filter capacitor from HP
Connect High-pass filter capacitor from HP
Connection for reference resistor that programs loop detector threshold and DC feed
current of both channels.
No Connect. This pin is not internally connected.
Receive Summing Node of channel 1. In the Active and Polarity Reversed states, the
current (both AC and DC) between A
into this pin. The networks that program receive gain and two-wire impedance of channel
1 connect to this node.
Receive Summing Node of channel 2. In the Active and Polarity Reversed states, the
current (both AC and DC) between A
into this pin. The networks that program receive gain and two-wire impedance of channel
2 connect to this node.
Thermal management of channel 1. External resistor connects from TMG
offload power from the SLIC device.
Thermal management of channel 2. External resistor connects from TMG2 to VBAT to
offload power from the SLIC device.
Battery supply and connection to substrate.
+5 V power supply.
Transmit audio signal of channel 1. This output is a scaled version of the A and B metallic
voltage. VTX also sources the two-wire input impedance programming network.
Transmit audio signal of channel 2. This output is a scaled version of the A and B metallic
voltage. VTX
The exposed thermal management pad must be in thermal contact with an exposed copper
plate with an electrical potential of battery supply (VBAT pin).
Zarlink Semiconductor Inc.
2
also sources the two-wire input impedance programming network.
5
CC
CC
.
.
1
2
(TIP) and B
(TIP) and B
Description
1
2
to B
to B
1
2
1
2
(RING).
(RING).
(RING) is equal to 500 times the current
(RING) is equal to 500 times the current
1
to VBAT to