92hd83 Integrated Device Technology, 92hd83 Datasheet - Page 250
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92hd83
Manufacturer Part Number
92hd83
Description
Single Chip Pc Audio System Codec+speaker Amplifier+capless Hp+ldo
Manufacturer
Integrated Device Technology
Datasheet
1.92HD83.pdf
(294 pages)
- Current page: 250 of 294
- Download datasheet (4Mb)
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
92HD83
SINGLE CHIP PC AUDIO SYSTEM, CODEC+SPEAKER AMPLIFIER+CAPLESS HP+LDO
Field Name
FrmtSmplRate
SmplRateMultp
SmplRateDiv
Rsvd1
BitsPerSmpl
NmbrChan
Reg
Set
7.25.5. SPDIFOut0 (NID = 1Dh): OutAmpLeft
Byte 4 (Bits 31:24)
Bits
14
Sample base rate: 1 = 44.1kHz, 0 = 48kHz.
13:11
Sample base rate multiple:
000b= x1 (48kHz/44.1kHz or less)
001b= x2 (96kHz/88.2kHz/32kHz)
010b= x3 (144kHz)
011b= x4 (192kHz/176.4kHz)
100b-111b Reserved
10:8
Sample base rate divider:
000b= Divide by 1 (48kHz/44.1kHz)
001b= Divide by 2 (24kHz/20.05kHz)
010b= Divide by 3 (16kHz/32kHz)
011b= Divide by 4 (11.025kHz)
100b= Divide by 5 (9.6kHz)
101b= Divide by 6 (8kHz)
110b= Divide by 7
111b= Divide by 8 (6kHz)
7
Reserved.
6:4
Bits per sample:
000b= 8 bits
001b= 16 bits
010b= 20 bits
011b= 24 bits
100b= 32 bits
101b-111b= Reserved
3:0
Total number of channels in the stream assigned to this converter:
0000b-1111b= 1-16 channels.
Byte 3 (Bits 23:16)
R/W
RW
RW
RW
R
RW
RW
Default
0h
0h
0h
0h
3h
1h
250
Byte 2 (Bits 15:8)
Reset
POR - DAFG - ULR
POR - DAFG - ULR
POR - DAFG - ULR
N/A (Hard-coded)
POR - DAFG - ULR
POR - DAFG - ULR
92HD83
Byte 1 (Bits 7:0)
3A0h
PC AUDIO
V 0.96 01/09
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