92hdw74e Integrated Device Technology, 92hdw74e Datasheet - Page 24
92hdw74e
Manufacturer Part Number
92hdw74e
Description
10-channel Hd Audio Codec, Dual Spdif
Manufacturer
Integrated Device Technology
Datasheet
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TEN CHANNEL HD AUDIO CODEC, PREMIUM WLP 3/4 COMPLIANT
Power State
92HDW74E
TEN CHANNEL HD AUDIO CODEC, PREMIUM WLP 3/4 COMPLIANT
Digital Mics
D1-D3
D0-D3
D0
0
1
2
3
4
DMIC Widget
either DMIC_0 or 1
Single Edge on the
one DMIC pin and
second DMIC pin.
Enabled
Double Edge on
Double Edge on
Single Edge on
DMIC_0 and 1
Data Sample
Double Edge
Yes
Yes
Single Edge
No
N/A
OR
Table 12. DMIC_CLK and DMIC_0,1 Operation During Power States
Clock Disabled
Clock Disabled
Clock Capable
DMIC_CLK
Output
ADC Conn.
0, or 1
0, or 1
0, or 1
0, or 1
N/A
Table 11. Valid Digital Mic Configurations
Input Disabled
Input Disabled
Input Capable
DMIC_0,1
sampling on a single Digital Mic pin channel on rising edge and second Digital Mic
right channel on falling edge of DMIC_CLK for those digital microphones that don’t
Requires both DMIC_0 or DMIC_1, External logic required to support sampling on
support alternative clock edge capability. If both DMIC_0 and DMIC_1 are used to
configuration is not recommended since it consumes two stereo ADC resources.
Connected to DMIC_0 and DMIC_1, External logic required to support sampling
support alternative clock edge capability. Two ADC units are required to support
support alternative clock edge capability. Two ADC units are required to support
support 2 digital microphones, 2 separate ADC units will be used, however, this
channel on falling edge of DMIC_CLK for those digital microphones that don’t
on a single Digital Mic pin channel on rising edge and second Digital Mic right
channel on falling edge of DMIC_CLK for those digital microphones that don’t
Both ADC Channels produce data, may be in phase or out by 1/2 DMIC_CLK
a single Digital Mic pin channel on rising edge and second Digital Mic right
Available on either DMIC_0 or DMIC_1, External logic required to support
period depending upon external configuration and timing
24
Input Widget is Enabled. Otherwise, the DMIC_CLK remains Low
DMIC_CLK Output is Enabled when either DMIC_0 or DMIC_1
Available on either DMIC_0 or DMIC_1
DMIC_CLK is HIGH-Z with Weak Pull-down
DMIC_CLK is HIGH-Z with Weak Pull-down
No Digital Microphones
this configuration
this configuration
Notes
92HDW74E
Notes
PC AUDIO
V 1.0 03/08
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