zl50023 Zarlink Semiconductor, zl50023 Datasheet - Page 69
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zl50023
Manufacturer Part Number
zl50023
Description
Enhanced 4 K Channel Tdm Switch With Rate Conversion
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50023.pdf
(83 pages)
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† Characteristics are over recommended operating conditions unless otherwise stated.
‡ Typical figures are at 25°C, VDD_CORE at 1.8 V and VDD_IO at 3.3 V and are for design aid only: not guaranteed and not subject to produc-
AC Electrical Characteristics
tion testing.
1
2
(16.384 MHz)
Input Frame Boundary
STi Setup Time
2.048 Mbps
4.096 Mbps
8.192 Mbps
16.384 Mbps
STi Hold Time
2.048 Mbps
4.096 Mbps
8.192 Mbps
16.384 Mbps
(4.096 MHz)
(8.192 MHz)
2.048 Mbps
4.096 Mbps
8.192 Mbps
STi0 - 31
STi0 - 31
STi0 - 31
Figure 27 - ST-BUS Input Timing Diagram when Operated at 2 Mbps, 4 Mbps, 8 Mbps
CKi
CKi
FPi
CKi
FPi
FPi
Characteristic
Ch127
Bit1
Ch31
Bit0
Ch63
Bit0
Ch127
Bit0
†
- ST-BUS/GCI-Bus Input Timing
Bit7
Ch0
t
t
SIS8
Sym.
t
t
t
t
t
t
t
SIH16
SIS16
SIS2
SIS4
SIS8
SIH2
SIH4
SIH8
Ch0
Bit7
Ch0
Zarlink Semiconductor Inc.
Bit6
t
SIH8
t
SIS4
ZL50023
Min.
5
5
5
5
8
8
8
8
t
SIH4
Ch0
Bit5
69
Bit7
Ch0
Typ.
Ch0
Bit6
t
SIS2
Ch0
Bit4
‡
t
SIH2
Max.
Ch0
Bit3
Units
Ch0
Bit5
ns
ns
ns
ns
ns
ns
ns
ns
Ch0
Bit2
Ch0
Bit1
Bit6
Ch0
Test Conditions
Ch0
Bit4
Ch0
Bit0
Data Sheet
V
V
V
V
CT
CT
CT
TT