zl50052 Zarlink Semiconductor, zl50052 Datasheet - Page 8
![no-image](/images/manufacturer_photos/0/7/727/zarlink_semiconductor_sml.jpg)
zl50052
Manufacturer Part Number
zl50052
Description
8 K Channel Digital Switch With High Jitter Tolerance, Single Rate 32 Mbps , And 16 Inputs And 16 Outputs
Manufacturer
Zarlink Semiconductor
Datasheet
1.ZL50052.pdf
(59 pages)
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Pinout Diagram: (as viewed through top of package)
A1 corner identified by metallized marking, mold indent, ink dot, or right-angled corner.
Figure 2 - ZL50052 PBGA Connections (196 PBGA, 15 mm x 15 mm) Pin Diagram
C
D
G
H
M
N
A
B
E
F
J
K
L
P
IC_GND BSTo7
IC_GND BSTo6
BSTo1
OPEN
OPEN
BSTi0
BSTi1
BSTi4
BSTi6
OPEN
OPEN
OPEN
GND
IC_
IC_
IC_
IC_
IC_
A0
1
BSTo2
BSTo5
OPEN
OPEN
BORS
BSTi2
BSTi5
OPEN
OPEN
OPEN
D13
IC_
IC_
IC_
IC_
IC_
D9
2
BSTo0
OPEN
OPEN
OPEN
OPEN
VDD_
CORE
BSTi3
BSTi7
OPEN
OPEN
D15
D10
IC_
IC_
IC_
IC_
IC_
IC_
A4
D8
3
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
BSTo3
GND
GND
D14
D11
A5
A1
D6
4
(as viewed through top of package)
VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO VDD_IO
BSTo4
CORE
CORE
CORE
CORE
VDD_
VDD_
VDD_
VDD_
GND
GND
D12
Zarlink Semiconductor Inc.
A8
A2
A3
D7
D4
5
VDD_IO VDD_IO VDD_IO
VDD_
CORE
VDD_
CORE
ZL50052
GND
GND
GND
GND
A9
A7
A6
D5
D3
D2
6
IC_GND IC_GND
CORE
CORE
VDD_
VDD_
GND
GND
GND
GND
A12
A11
A10
D0
D1
8
7
IC_GND
IC_GND
VDD_
CORE
VDD_
CORE
GND
GND
GND
GND
A13
A14
DS
8
RESET
CORE
CORE
VDD_
VDD_
VDD_
OPEN
C16o
ODE
GND
GND
GND
GND
R/W
DTA
PLL
IC_
9
VDD_IO
OPEN
CORE
CORE
CORE
CORE
VDD_
VDD_
VDD_
VDD_
GND
GND
FP8i
C8o
CS
TDi
IC_
C8i
10
IC_GND
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
VDD_IO
OPEN
OPEN
FP8o
GND
GND
TMS
TCK
IC_
IC_
11
OPEN
OPEN
LSTo4
OPEN
OPEN
OPEN
CORE
OPEN
OPEN
OPEN
OPEN
FP16o
VDD_
LSTi5
TDo
IC_
IC_
IC_
IC_
IC_
IC_
IC_
IC_
IC_
12
IC_GND
OPEN
LSTo0
LSTo6
LSTo7
OPEN
OPEN
LORS
OPEN
OPEN
LSTi1
LSTi3
LSTi7
GND
IC_
IC_
IC_
IC_
IC_
13
LSTo1
LSTo3
LSTo2
LSTo5
OPEN
OPEN
OPEN
OPEN
TRST
LSTi2
LSTi0
LSTi6
LSTi4
GND
IC_
IC_
IC_
IC_
14
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