zl50411 Zarlink Semiconductor, zl50411 Datasheet - Page 108

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zl50411

Manufacturer Part Number
zl50411
Description
Managed 9-port Fast Ethernet Switch With Private Vlan
Manufacturer
Zarlink Semiconductor
Datasheet

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12.3.7.4
CPU Address: h0603
Accessed by CPU (R/W)
Note : Before programming MII command: set FEN[6]; check MIIC3, making sure RDY; then program MII
command.
12.3.7.5
CPU Address: h0604
Accessed by CPU (R/W)
Bit [4]:
Bit [5]:
Bit [6]:
Bit [7]:
Bits [7:0]:
Bits [7:0]:
MIIC0 – MII Command Register 0
MIIC1 – MII Command Register 1
Disable IP Multicast Suppor t
0 – Enable IP Multicast Support (Must also set PVMODE[6]=1)
1 – Disable IP Multicast Support (Default)
When enable, IGMP packets are identified by search engine and are passed
to the CPU for processing. IP multicast packets are forwarded to the IP
multicast group members according to the VLAN port mapping table.
Report to CPU
0 – Disable (Default)
1 – Enable
When disable new VLAN port association report, new MAC address report or
aging reports are disable for all ports. When enable, register SE_OPMODE is
used to enable/disable selectively each function.
MII Management State Machine
0: Enable (Default)
1: Disable
This bit must be set so that there is no contention on the MDIO bus between
MII Management state machine and MIIC & MIID PHY register accesses.
MCT Link List structure
0 – Enable (Default)
1 – Disable
MII Command Data [7:0]
MII Command Data [15:8]
Zarlink Semiconductor Inc.
ZL50411
108
Data Sheet

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