89hpes24nt3 Integrated Device Technology, 89hpes24nt3 Datasheet - Page 13
![no-image](/images/no-image-200.jpg)
89hpes24nt3
Manufacturer Part Number
89hpes24nt3
Description
24-lane, 3-port Pcie Inter-domain Switch
Manufacturer
Integrated Device Technology
Datasheet
1.89HPES24NT3.pdf
(31 pages)
Recommended Operating Supply Voltages
Power-Up Sequence
PES24NT3, the power-up sequence must be as follows:
are avoided. There are no maximum time limitations in ramping to valid power levels. The power-down sequence must be in the reverse order of the
power-up sequence.
IDT 89HPES24NT3 Data Sheet
This section describes the sequence in which various voltages must be applied to the part during power-up to ensure proper functionality. For the
1. V
2. V
3. V
When powering up, each voltage level must ramp and stabilize prior to applying the next voltage in the sequence to ensure internal latch-up issues
DD
DD
TT
V
V
V
V
V
V
PE — 1.5V
I/O — 3.3V
Core, V
DD
DD
DD
DD
TT
SS
Symbol
PE
CORE
I/O
PE
APE
DD
PE, V
Internal logic supply
I/O supply except for SerDes LVPECL/CML
PCI Express Digital Power
PCI Express Analog Power
PCI Express Serial Data Transmit Termina-
tion Voltage
Common ground
JTAG_TRST_N
DD
APE — 1.0V
JTAG_TMS
JTAG_TDO
JTAG_TCK
JTAG_TDI
Parameter
Tpw_16d
Table 12 PES24NT3 Operating Voltages
Figure 5 JTAG AC Timing Waveform
Tsu_16b
Tsu_16b
Thld_16b
Thld_16b
Thigh_16a
13 of 31
Minimum
1.425
0.9
3.0
0.9
0.9
0
Tlow_16a
Tlow_16a
Typical
Tdo_16c
3.3
1.0
1.0
1.0
1.5
0
Tper_16a
Maximum
1.575
3.6
1.1
1.1
1.1
0
Tdz_16c
Unit
April 11, 2007
V
V
V
V
V
V