at86rf535a ATMEL Corporation, at86rf535a Datasheet - Page 6

• Manufacturer Part Number: at86rf535a
• Description: Wimax Transceiver 802.16-2004
• Manufacturer: ATMEL Corporation

Calibration Support
SPI Interface
6
AT86RF535A [Preliminary]
combined analog and digital – hybrid – operating phase locked loop (Hybrid PLL) is to overcome
tolerance, noise and integration problems in the VCO.
Because of the course digital tuning, the analog tuning gain could be reduced so that the charac-
teristic impedance of the loop filter increases and the charge pump current is reduced. That
helps to integrate the whole active loop filter (APLL).
Use of two (proportional and integral component) charge pumps and programming their currents
permit changing of filter parameters.
The phase interpolation divider (PDIV) is an alternate of a conventional modulus divider. It has
the speed and power advantages of an asynchron divider and is programmable in a restricted
range.
Calibration of transceiver imbalances has to be performed by appendant BB/MAC processor.
This processor generates corresponding control signals. The AT86RF535A contains additional
analog calibration modules detecting for excellent calibration support:
The control values will be given as analog control voltage.
Serial peripheral interface (SPI) controls the transceiver. This 4-wire bus contains the ports SDE,
SCL, SDI and SDO. The SPI has an 8-bit organization. Each transmission starts with a com-
mand byte with following structure:
Table 4.
The command bit CMD is set to “1“ for WRITE operation and “0” for READ operation.
The transmission continues with the data bytes. The number of data bytes depends on the reg-
ister. The MSB of each data byte is sent first.
Table 5.
MSB
CMD
MSB
DATA7
1. LO signal leakage,
2. IQ signal imbalances in the TX Path, and
3. IQ signal imbalances in the RX Path.
ADR6
DATA6
SPI Interface Structure
For an 8 Bit Register
ADR5
DATA5
DATA4
ADR4
DATA3
ADR3
DATA2
ADR2
DATA1
ADR1
5108B–WiMax–2/06
LSB
ADR0
LSB
DATA0