stac9708 ETC-unknow, stac9708 Datasheet - Page 17

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stac9708

Manufacturer Part Number
stac9708
Description
Multi-channel Ac97 Codec With Multi-codec Option
Manufacturer
ETC-unknow
Datasheet

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3.1.1.2 Slot 2: Command Data Port
The command data port is used to deliver 16-bit control register write data in the event that
the current command port operation is a write cycle. (as indicated by Slot 1, bit 19)
Bit (19:4)
Bit (3 :0)
If the current command port operation is a read then the entire slot time must be stuffed with
0's by the AC'97 controller.
3.1.1.3 Slot 3: PCM Playback Left Channel
Audio output frame slot 3 is the composite digital audio left playback stream. In a typical
“Games Compatible" PC this slot is composed of standard PCM (.wav) output samples
digitally mixed (on the AC'97 controller or host processor) with music synthesis output
samples. If a sample stream of resolution less than 20-bits is transferred, the AC'97 controller
must stuff all trailing non-valid bit positions within this time slot with 0's.
3.1.1.4 Slot 4: PCM Playback Right Channel
Audio output frame slot 4 is the composite digital audio right playback stream. In a typical
“Games Compatible" PC this slot is composed of standard PCM (.wav) output samples
digitally mixed (on the AC'97 controller or host processor) with music synthesis output
samples. If a sample stream of resolution less than 20-bits is transferred, the AC'97 controller
must stuff all trailing non-valid bit positions within this time slot with 0's.
3.1.1.5 Slot 5: Reserved
Audio output frame slot 5 is reserved for modem operation and is not used by the
STAC9708/11.
3.1.1.6 Slot 6: PCM Center Channel
Audio output frame slot 6 is the composite digital audio center stream used in a multi-channel
application where the STAC9708/11 is programmed to accept the primary DAC PCM data
from slots 6 and 9. As a programming option, PCM data from slots 6 and 9 may be used to
supply data to the surround DACs when slots 7 and 8 are used to drive the primary DACs.
Please refer to the register programming section for details on the multi-channel programming
options.
Control Register Write Data
Reserved
Preliminary
17
(Stuffed with 0's)
(Stuffed with 0's if current operation is a read)
STAC9708/11
10/02/98

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