lrs1805a Sharp Microelectronics of the Americas, lrs1805a Datasheet - Page 34
lrs1805a
Manufacturer Part Number
lrs1805a
Description
Stacked Chip Flash Memory Smartcombo
Manufacturer
Sharp Microelectronics of the Americas
Datasheet
1.LRS1805A.pdf
(57 pages)
- Current page: 34 of 57
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Write Cycle Timing Chart (S-UB, S-LB Controlled)
Address
S-CE
S-UB
S-WE
S-LB
D
D
OUT
IN
Notes:
1. If S-OE = High, D
2. S-CE
1
V
V
V
V
V
V
V
V
V
V
2
V
V
OH
IH
IH
IH
IH
OL
and S-WE must be High level for entire write cycle.
IL
IL
IL
IL
IH
IL
OUT
High-Z
will be a High-Z state.
t
AS
L R S 1 8 0 5 A
t
ASC
ADDRESS STABLE
t
t
t
BLZ
WHZ
AW
t
t
CW
WP
t
WC
t
BW
VALID INPUT
t
DW
t
WR
t
DH
t
AHC
High-Z
32
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