k4t56083qf Samsung Semiconductor, Inc., k4t56083qf Datasheet - Page 25

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k4t56083qf

Manufacturer Part Number
k4t56083qf
Description
256mb F-die Ddr2 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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256Mb F-die DDR2 SDRAM
culation is consistent.
These notes are referenced in the “Timing parameters by speed grade” tables for DDR2-400/533/667 and
DDR2-800.
29. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input sig-
nal crossing at the V
signal crossing at the V
device under test.
30. Input waveform timing with differential data strobe enabled MR[bit10]=0, is referenced from the input sig-
nal crossing at the V
differential data strobe crosspoint for a falling signal applied to the device under test.
tRPST
tHZ,tRPST
tHZ
end point
DQS
DQS
IH(ac)
IH(dc)
end point
T1
IL(ac)
T2
level to the differential data strobe crosspoint for a rising signal, and from the input
level to the differential data strobe crosspoint for a rising signal and V
level to the differential data strobe crosspoint for a falling signal applied to the
Differential Input waveform timing
= 2*T1-T2
tDS
<Test method for tLZ, tHZ, tRPRE and tRPST>
VOH + x mV
VOH + 2x mV
VOL + 2x mV
VOL + x mV
tDH
Page 25 of 27
tDS
VTT + 2x mV
VTT + x mV
VTT - x mV
VTT - 2x mV
tDH
tLZ,tRPRE
begin point
V
V
V
V
V
V
V
DDQ
IH(ac)
IH(dc)
IL(dc)
IL(ac)
SS
T1
REF(dc)
T2
max
max
min
min
Rev. 1.5 Feb. 2005
DDR2 SDRAM
= 2*T1-T2
tLZ
tRPRE
IL(dc)
begin point
to the

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