k4s64323lf-sn Samsung Semiconductor, Inc., k4s64323lf-sn Datasheet
k4s64323lf-sn
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k4s64323lf-sn Summary of contents
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... K4S64323LF-S(D)N/U/P Mobile SDRAM (VDD/VDDQ 2.5V/1.8V or 2.5V/2.5V) 2Mx32 90FBGA Revision 1.5 December 2002 CMOS SDRAM Rev. 1.5 Dec 2002 ...
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... LCBR CLK CKE GENERAL DESCRIPTION The K4S64323LF is 67,108,864 bits synchronous high data rate Dynamic RAM organized 524,288 words by 32 bits, fabri- cated with SAMSUNG s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock. I/O transactions are possible on every clock cycle. ...
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... K4S64323LF-S(D)N/U/P 90-Ball FBGA Package Dimension and Pin Configuration < Bottom View *2: Top View Substrate(4Layer) *1: Bottom View < Top View #A1 Ball Origin Indicator *1 > ...
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... K4S64323LF-S(D)N/U/P ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Notes : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. ...
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... CC4 Refresh Current I CC5 Self Refresh Current I CC6 Notes : 1. Measured with outputs open. 2. Refresh period is 64ms. 3. K4S64323LF-S(D)N/P** 4. K4S64323LF-S(D)U** 5. Unless otherwise noted, input swing IeveI is CMOS for Extended, - for Industrial Test Condition Burst length = (min) ...
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... K4S64323LF-S(D)N/U/P AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition VDDQ 500 Output 30pF 500 (Fig Output Load Circuit OPERATING AC PARAMETER Parameter Row active to row active delay ...
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... K4S64323LF-S(D)N/U/P AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=1 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=1 CAS latency=3 Output data hold time CAS latency=2 CAS latency=1 CLK high pulse width ...
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... K4S64323LF-S(D)N/U/P SIMPLIFIED TRUTH TABLE (V=Valid, X=Don t Care, H=Logic High, L=Logic Low) COMMAND Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable ...