k4s563233f Samsung Semiconductor, Inc., k4s563233f Datasheet

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k4s563233f

Manufacturer Part Number
k4s563233f
Description
2m X 32bit X 4 Banks Mobile Sdram In 90fbga
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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K4S563233F - F(H)E/N/G/C/L/F
2M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA
FEATURES
• 3.0V & 3.3V power supply.
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
• Burst read single-bit write operation.
• Special Function Support.
• DQM for masking.
• Auto refresh.
• 64ms refresh period (4K cycle).
• Commercial Temperature Operation (-25 C ~ 70 C).
• Extended Temperature Operation (-25 C ~ 85 C).
• 90Balls FBGA ( -FXXX -Pb, -HXXX -Pb Free).
ORDERING INFORMATION
- F(H)E/N/G : Normal/Low/Super Low Power, Extended Temperature(-25 C ~ 85 C)
- F(H)C/L/F : Normal/Low/Super Low Power, Commercial Temperature(-25 C ~ 70 C)
NOTES :
1. In case of 40MHz Frequency, CL1 can be supported.
2. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake.
Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific pur
pose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.
clock.
-. CAS latency (1, 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
-. PASR (Partial Array Self Refresh).
-. Internal TCSR (Temperature Compensated Self Refresh)
K4S563233F-F(H)E/N/G/C/L/F1H
K4S563233F-F(H)E/N/G/C/L/F60
K4S563233F-F(H)E/N/G/C/L/F75
K4S563233F-F(H)E/N/G/C/L/F1L
Part No.
133MHz(CL=3),111MHz(CL=2)
111MHz(CL=3)*1
166MHz(CL=3)
111MHz(CL=2)
Max Freq.
GENERAL DESCRIPTION
rate Dynamic RAM organized as 4 x 2,097,152 words by 32 bits,
fabricated with SAMSUNG’s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock and I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst lengths and programmable latencies allow the same
device to be useful for a variety of high bandwidth and high per-
formance memory system applications.
1
The K4S563233F is 268,435,456 bits synchronous high data
Interface
LVCMOS
Mobile-SDRAM
90 FBGA Pb
(Pb Free)
Package
May 2004

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k4s563233f Summary of contents

Page 1

... Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific pur pose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use. GENERAL DESCRIPTION The K4S563233F is 268,435,456 bits synchronous high data rate Dynamic RAM organized 2,097,152 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technol- ogy ...

Page 2

... K4S563233F - F(H)E/N/G/C/L/F FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR LWE CLK CKE CS Data Input Register Column Decoder Latency & Burst Length Programming Register LCAS LWCBR Timing Register RAS CAS WE DQM 2 Mobile-SDRAM LWE LDQM ...

Page 3

... K4S563233F - F(H)E/N/G/C/L/F Package Dimension and Pin Configuration *1 < Bottom View > E/2 Substrate(2Layer) *2 < Top View > #A1 Ball Origin Indicator DQ26 B DQ28 C V SSQ D V SSQ E V DDQ ...

Page 4

... K4S563233F - F(H)E/N/G/C/L/F ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current NOTES: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...

Page 5

... K4S563233F - F(H)E/N/G/C/L/F DC CHARACTERISTICS Recommended operating conditions (Voltage referenced to V Parameter Symbol Burst length = 1 Operating Current I t CC1 RC (One Bank Active CKE CC Precharge Standby Current in power-down mode I 2PS CKE & CLK CC CKE Input signals are changed one time during Precharge Standby Current ...

Page 6

... K4S563233F - F(H)E/N/G/C/L/F AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition VDDQ 1200 VOH (DC) = 2.4V, IOH = -2mA Output VOL (DC) = 0.4V, IOL = 2mA 30pF 870 Figure 1. DC Output Load Circuit ( ...

Page 7

... K4S563233F - F(H)E/N/G/C/L/F OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Parameter Row active to row active delay t RAS to CAS delay t Row precharge time t Row active time t Row cycle time Last data in to row precharge t Last data in to Active delay t Last data in to new col. address delay ...

Page 8

... K4S563233F - F(H)E/N/G/C/L/F AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=1 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=1 CAS latency=3 Output data hold time CAS latency=2 CAS latency=1 CLK high pulse width ...

Page 9

... K4S563233F - F(H)E/N/G/C/L/F SIMPLIFIED TRUTH TABLE COMMAND Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable ...

Page 10

... K4S563233F - F(H)E/N/G/C/L/F A. MODE REGISTER FIELD TABLE TO PROGRAM MODES Register Programmed with Normal MRS BA0 ~ BA1 Address A11 ~ A10/AP "0" Setting for Function RFU Normal MRS Normal MRS Mode Test Mode CAS Latency A8 A7 Type Mode Register Set Reserved ...

Page 11

... K4S563233F - F(H)E/N/G/C/L/F Partial Array Self Refresh 1. In order to save power consumption, Mobile SDRAM has PASR option. 2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full Array, 1/2 of Full Array and 1/4 of Full Array ...

Page 12

... K4S563233F - F(H)E/N/G/C/L/F C. BURST SEQUENCE 1. BURST LENGTH = 4 Initial Address BURST LENGTH = 8 Initial Address ...

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