k4s511632d Samsung Semiconductor, Inc., k4s511632d Datasheet

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k4s511632d

Manufacturer Part Number
k4s511632d
Description
Ddp 512mbit Sdram 8m X 16bit X 4 Banks Synchronous Dram Lvttl
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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K4S511632D
CMOS SDRAM
DDP 512Mbit SDRAM
8M x 16bit x 4 Banks
Synchronous DRAM
LVTTL
Revision 0.0
July. 2002
This is to advise Samsung customers that in accordance with certain terms of an agreement, Samsung is prohibited from selling any DRAM
products configured in "Multi-Die Plastic" format for use as components in general and scientific computers, such as mainframes, servers,
work stations or desk top personal computers (hereinafter "Prohibited Computer Use"). Applications such as mobile, including cell phones,
telecom, including televisions and display monitors, or non-desktop computer systems, including laptops, notebook computers, are ,
however, permissible. "Multi-Die Plastic" is defined as two or more Dram die encapsulated within a single plastic leaded package
* Samsung Electronics reserves the right to change products or specification without notice.
Rev. 0.0 July. 2002

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k4s511632d Summary of contents

Page 1

... K4S511632D DDP 512Mbit SDRAM This is to advise Samsung customers that in accordance with certain terms of an agreement, Samsung is prohibited from selling any DRAM products configured in "Multi-Die Plastic" format for use as components in general and scientific computers, such as mainframes, servers, work stations or desk top personal computers (hereinafter "Prohibited Computer Use"). Applications such as mobile, including cell phones, telecom, including televisions and display monitors, or non-desktop computer systems, including laptops, notebook computers, are , however, permissible. " ...

Page 2

... K4S511632D Revision 0.0 (July, 2002) CMOS SDRAM Rev. 0.0 July. 2002 ...

Page 3

... CS * Samsung Electronics reserves the right to change products or specification without notice. GENERAL DESCRIPTION The K4S511632D is 536,870,912 bits synchronous high data rate Dynamic RAM organized 8,392,608words by 16bits, fabri- cated with SAMSUNG's high performance CMOS technology. Syn- chronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle ...

Page 4

... K4S511632D PIN CONFIGURATION (Top view) A10/AP PIN FUNCTION DESCRIPTION Pin Name CLK System cock CS Chip select CKE Clock enable Address Bank select address 0 1 RAS Row address strobe CAS Column address strobe WE Write enable L(U)DQM Data input/output mask ...

Page 5

... K4S511632D ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Voltage on V supply relative to Vss DD Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to recommended operating condition. Exposure to higher than recommended voltage for extended periods of time could affect device reliability. ...

Page 6

... Operating current I CC4 (Burst mode) Refresh current I CC5 Self refresh current I CC6 Notes : 1. Measured with outputs open. 2. Refresh period is 64ms. 3. K4S511632D-KC** 4. K4S511632D-KL** 5. Unless otherwise noticed, input swing level is CMOS Test Condition Burst length = (min CKE ...

Page 7

... K4S511632D AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition 3.3V 1200 Output 50pF 870 (Fig output load circuit OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) ...

Page 8

... K4S511632D AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter Symbol CAS latency=3 CLK cycle time CAS latency=2 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=3 Output data hold time CAS latency=2 CLK high pulse width CLK low pulse width Input setup time ...

Page 9

... K4S511632D SIMPLIFIED TRUTH TABLE Command Register Mode register set Auto refresh Entry Refresh Self refresh Exit Bank active & row addr. Read & Auto precharge disable column address Auto precharge enable Write & Auto precharge disable column address Auto precharge enable ...

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