k4s51153pf Samsung Semiconductor, Inc., k4s51153pf Datasheet
k4s51153pf
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k4s51153pf Summary of contents
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... Address configuration Organization 32M x16 GENERAL DESCRIPTION The K4S51153PF is 536,870,912 bits synchronous high data rate Dynamic RAM organized 8,388,608 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS technol- ogy. Synchronous design allows precise cycle control with the use of system clock and I/O transactions are possible on every clock cycle ...
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... K4S51153PF - Y(P)F FUNCTIONAL BLOCK DIAGRAM CLK, /CAS, /RAS, /WE, DQM, CKE /CS1 /CS0 Mobile SDRAM 16Mx16 16Mx16 DQ0~DQ15 A0~A12, BA0, BA1 2 September 2004 ...
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... K4S51153PF - Y(P)F Package Dimension and Pin Configuration *1 < Bottom View E/2 *2: Top View Substrate(2Layer) *1: Bottom View *2 < Top View > #A1 Ball Origin Indicator > VSS B DQ14 C DQ12 D DQ10 E DQ8 F UDQM G A12 H A8 ...
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... K4S51153PF - Y(P)F ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current NOTES: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... K4S51153PF - Y(P)F DC CHARACTERISTICS Recommended operating conditions (Voltage referenced to V Parameter Symbol Operating Current I CC1 (One Bank Active) CKE ≤ CC2 Precharge Standby Current in power-down mode PS CKE & CLK ≤ CC2 CKE ≥ CC2 Input signals are changed one time during 20ns ...
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... K4S51153PF - Y(P)F AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition 1.8V 13.9KΩ VOH (DC) = VDDQ - 0.2V, IOH = -0.1mA Output VOL (DC) = 0.2V, IOL = 0.1mA 20pF 10.6KΩ Figure 1. DC Output Load Circuit = 1.7V ∼ ...
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... K4S51153PF - Y(P)F OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Parameter Row active to row active delay RAS to CAS delay Row precharge time Row active time Row cycle time Last data in to row precharge Last data in to Active delay Last data in to new col. address delay ...
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... K4S51153PF - Y(P)F AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CAS latency=3 CLK cycle time CAS latency=2 CAS latency=1 CAS latency=3 CLK to valid output delay CAS latency=2 CAS latency=1 CAS latency=3 Output data hold time CAS latency=2 CAS latency=1 CLK high pulse width ...
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... K4S51153PF - Y(P)F SIMPLIFIED TRUTH TABLE COMMAND Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable ...
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... K4S51153PF - Y(P)F A. MODE REGISTER FIELD TABLE TO PROGRAM MODES Register Programmed with Normal MRS BA0 ~ BA1 Address A12 ~ A10/AP "0" Setting for Normal Function MRS Normal MRS Mode Test Mode CAS Latency A8 A7 Type Mode Register Set Reserved ...
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... K4S51153PF - Y(P)F Partial Array Self Refresh 1. In order to save power consumption, Mobile SDRAM has PASR option. 2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full Array, 1/2 of Full Array and 1/4 of Full Array. BA1=0 BA1=0 BA0=0 BA0=1 BA1=1 BA1=1 BA0=0 BA0=1 - Full Array Internal Temperature Compensated Self Refresh (TCSR) Note : 1 ...
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... K4S51153PF - Y(P)F C. BURST SEQUENCE 1. BURST LENGTH = 4 Initial Address BURST LENGTH = 8 Initial Address ...