k4s513233f Samsung Semiconductor, Inc., k4s513233f Datasheet

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k4s513233f

Manufacturer Part Number
k4s513233f
Description
Mobile Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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K4S513233F - M(E)C/L/F
4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA
FEATURES
• 3.0V & 3.3V power supply.
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
• Burst read single-bit write operation.
• Special Function Support.
• DQM for masking.
• Auto refresh.
• 64ms refresh period (8K cycle).
• Commercial Temperature Operation (-25 C ~ 70 C).
• 2Chips DDP 90Balls FBGA ( -MXXX -Pb, -EXXX -Pb Free).
ORDERING INFORMATION
- M(E)C/L/F : Normal / Low / Low Power, Commercial Temperature(-25 C ~ 70 C)
NOTES :
1. In case of 40MHz Frequency, CL1 can be supported.
2. Samsung shall not offer for sale or sell either directly or through and third-party proxy, and DRAM memory products that include "Multi-Die Plastic
3. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake.
DRAM" for use as components in general and scientific computers such as, by way of example, mainframes, servers, work stations or desk top
computers for the first three years of five year term of this license. Nothing herein limits the rights of Samsung to use Multi-Die Plastic DRAM in other
products or other applications under paragrangh such as mobile, telecom or non-computer application(which include by way of example laptop or
notebook computers, cell phones, televisions or visual monitors)
Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific pur
pose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use.
clock.
Violation may subject the customer to legal claims and also excludes any warranty against infringement from Samsung." .
-. CAS latency (1, 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
-. PASR (Partial Array Self Refresh).
-. Internal TCSR (Temperature Compensated Self Refresh)
K4S513233F-M(E)C/L/F1H
K4S513233F-M(E)C/L/F75
K4S513233F-M(E)C/L/F1L
Part No.
133MHz(CL=3), 111MHz(CL=2)
111MHz(CL=3)*1, 83MHz(CL2)
111MHz(CL=2)
Max Freq.
GENERAL DESCRIPTION
rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits,
fabricated with SAMSUNG’s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock and I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst lengths and programmable latencies allow the same
device to be useful for a variety of high bandwidth and high per-
formance memory system applications.
1
The K4S513233F is 536,870,912 bits synchronous high data
Interface
LVCMOS
Mobile SDRAM
September 2004
90 FBGA Pb
(Pb Free)
Package

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k4s513233f Summary of contents

Page 1

... Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific pur pose, such as medical, aerospace, nuclear, military, vehicular or undersea repeater use. GENERAL DESCRIPTION The K4S513233F is 536,870,912 bits synchronous high data rate Dynamic RAM organized 4,196,304 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technol- ogy ...

Page 2

... K4S513233F - M(E)C/L/F FUNCTIONAL BLOCK DIAGRAM Bank Select CLK ADD LCKE LRAS LCBR LWE CLK CKE CS Data Input Register Column Decoder Latency & Burst Length Programming Register LCAS LWCBR Timing Register RAS CAS WE DQM 2 Mobile SDRAM LWE ...

Page 3

... K4S513233F - M(E)C/L/F Package Dimension and Pin Configuration *1 < Bottom View > E/2 Substrate(2Layer) *2 < Top View > #A1 Ball Origin Indicator DQ26 B DQ28 C V SSQ D V SSQ E V DDQ ...

Page 4

... K4S513233F - M(E)C/L/F ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative Voltage on V supply relative Storage temperature Power dissipation Short circuit current NOTES: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...

Page 5

... K4S513233F - M(E)C/L/F DC CHARACTERISTICS Recommended operating conditions (Voltage referenced to V Parameter Symbol Operating Current I CC1 (One Bank Active CKE CC2 Precharge Standby Current in power-down mode I PS CKE & CLK CC2 CKE I N CC2 Input signals are changed one time during 20ns Precharge Standby Current ...

Page 6

... K4S513233F - M(E)C/L/F AC OPERATING TEST CONDITIONS Parameter AC input levels (Vih/Vil) Input timing measurement reference level Input rise and fall time Output timing measurement reference level Output load condition VDDQ 1200 VOH (DC) = 2.4V, IOH = -2mA Output VOL (DC) = 0.4V, IOL = 2mA 30pF 870 Figure 1. DC Output Load Circuit ( ...

Page 7

... K4S513233F - M(E)C/L/F OPERATING AC PARAMETER (AC operating conditions unless otherwise noted) Parameter Row active to row active delay RAS to CAS delay Row precharge time Row active time Row cycle time Last data in to row precharge Last data in to Active delay Last data in to new col. address delay Last data in to burst stop Col ...

Page 8

... K4S513233F - M(E)C/L/F AC CHARACTERISTICS (AC operating conditions unless otherwise noted) Parameter CLK cycle time CAS latency=3 CLK cycle time CAS latency=2 CLK cycle time CAS latency=1 CLK to valid output delay CAS latency=3 CLK to valid output delay CAS latency=2 CLK to valid output delay CAS latency=1 ...

Page 9

... K4S513233F - M(E)C/L/F SIMPLIFIED TRUTH TABLE COMMAND Register Mode Register Set Auto Refresh Entry Refresh Self Refresh Exit Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable ...

Page 10

... K4S513233F - M(E)C/L/F A. MODE REGISTER FIELD TABLE TO PROGRAM MODES Register Programmed with Normal MRS BA0 ~ BA1 Address A12 ~ A10/AP "0" Setting for Function RFU Normal MRS Normal MRS Mode Test Mode CAS Latency A8 A7 Type Mode Register Set Reserved ...

Page 11

... K4S513233F - M(E)C/L/F Partial Array Self Refresh 1. In order to save power consumption, Mobile SDRAM has PASR option. 2. Mobile SDRAM supports 3 kinds of PASR in self refresh mode : Full Array, 1/2 of Full Array and 1/4 of Full Array ...

Page 12

... K4S513233F - M(E)C/L/F C. BURST SEQUENCE 1. BURST LENGTH = 4 Initial Address BURST LENGTH = 8 Initial Address ...

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