srf-2724cs RF Micro Devices, srf-2724cs Datasheet - Page 21

• Manufacturer Part Number: srf-2724cs
• Description: 2.4ghz Low-if 1.5mbps Fsk Transceiver
• Manufacturer: RF Micro Devices

RCLP - Register 0, Bit 11
RSSI Clip Enable: The RCLP bit disables the RSSI clipping circuitry. With RCLP low, the RSSI output voltage is clipped to a maxi-
mum of about 2.0V at –10dBm. With RCLP high, the RSSI is not clipped. (see Table 13).
CHQ <11:0> - Register 1, Bits 2-13
Channel Frequency Selection: These bits set the RF carrier frequency for the transceiver (see Table 14). With a 6.144MHz or
12.288MHz clock at the FREF pin, the channel frequency value is calculated by multiplying the CHQ value by 1.024. The rec-
ommended operating range value of the CHQ is from 2,346 to 2,424. These bits must be programmed to a valid channel fre-
quency before XCEN is asserted.
The divide ratio is calculated as fC /1.024 where fC is the channel frequency in MHz.
CHQ <11:0> - Register 1, Bits 2-13
Channel Frequency Selection: These bits set the RF carrier frequency for the transceiver (see Table 14). With a 6.144MHz or
12.288MHz clock at the FREF pin, the channel frequency value is calculated by multiplying the CHQ value by 1.024. The rec-
ommended operating range value of the CHQ is from 2,346 to 2,424. These bits must be programmed to a valid channel fre-
quency before XCEN is asserted.
Prelim DS090410
f
C
=1.024 * CHQ
Table 14: Main Divider
Table 14: Main Divider
B15
B15
0
0
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Table 13: RCLP Operation
Proposed
B14
B14
0
0
RCLP
0
1
RSSI output clipped to a maximum of ~1.9V at
CHQ - PLL Divide Ratio
CHQ - PLL Divide Ratio
B13 to B2
B13 to B2
RSSI output not clipped
RSSI Behavior
-15dBm
B1
B1
0
0
SRF-2724CS
B0
B0
1
1
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