m368l1624dtm Samsung Semiconductor, Inc., m368l1624dtm Datasheet - Page 3
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m368l1624dtm
Manufacturer Part Number
m368l1624dtm
Description
184pin Unbuffered Module Based On 256mb D-die 64/72-bit Non Ecc/ecc
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.M368L1624DTM.pdf
(22 pages)
128MB, 256MB, 512MB Unbuffered DIMM
184Pin Unbuffered DIMM based on 256Mb D-die (x8, x16)
Ordering Information
Operating Frequencies
Feature
• Power supply : Vdd: 2.6V ± 0.1V, Vddq: 2.6V ± 0.1V
•
• Bidirectional data strobe(DQS)
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• Programmable Read latency 3 (clock) for DDR400 , 2.5 (clock) for DDR333
• Programmable Burst length (2, 4, 8)
• Programmable Burst type (sequential & interleave)
• Edge aligned data output, center aligned data input
• Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh)
• Serial presence detect with EEPROM
• PCB : Height 1,250 (mil), single (128MB, 256MB) and double(512MB) sided
• SSTL_2 Interface
Double-data-rate architecture; two data transfers per clock cycle
M368L1624DTM-C(L)CC/C4
M368L3223DTM-C(L)CC/C4
M368L6423DTM-C(L)CC/C4
M381L3223DTM-C(L)CC/C4
M381L6423DTM-C(L)CC/C4
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Speed @CL3
CL-tRCD-tRP
Part Number
Density
128MB
256MB
512MB
256MB
512MB
CC(DDR400@CL=3)
200MHz
Organization
3-3-3
16M x 64
32M x 64
64M x 64
32M x 72
64M x 72
16Mx16( K4H561638D) * 4EA
32Mx8( K4H560838D) * 16EA
32Mx8( K4H560838D) * 18EA
32Mx8( K4H560838D) * 8EA
32Mx8( K4H560838D) * 9EA
Component Composition
C4(DDR400@CL=3)
Rev. 1.2 May. 2003
200MHz
3-4-4
DDR SDRAM
1,250(mil)
1,250(mil)
1,250(mil)
1,250(mil)
1,250(mil)
Height