m470l3224dt0 Samsung Semiconductor, Inc., m470l3224dt0 Datasheet
m470l3224dt0
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m470l3224dt0 Summary of contents
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... M470L3224DT0 256MB DDR SDRAM MODULE (32Mx64 based on 16Mx 16 DDR SDRAM) 200pin SODIMM 64bit Non-ECC/Parity Revision 0.1 Jan. 2002 200pin DDR SDRAM SODIMM Rev. 0.1 Jan. 2002 ...
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... M470L3224DT0 Revision History Revision 0.0 (Dec. 2001) 1. First release. Revision 0.1 (Jan, 2002) 1. Added tRAP(Active to Read w/ autoprecharge command) 200pin DDR SDRAM SODIMM Rev. 0.1 Jan. 2002 ...
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... M470L3224DT0 200pin DDR SDRAM SODIMM 32Mx64 200pin DDR SDRAM SODIMM based on 16Mx16 GENERAL DESCRIPTION The Samsung M470L3224DT0 is 32M bit x 64 Double Data Rate SDRAM high density memory modules. The Samsung M470L3224DT0 consists of eight CMOS 16M x 16 bit with 4banks Double Data Rate SDRAMs in 66pin TSOP- II(400mil) packages mounted on a 200pin glass-epoxy sub- strate ...
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... M470L3224DT0 FUNCTIONAL BLOCK DIAGRAM S1 S0 DQS0 LDQS S DM0 LDM DQ0 I/0 0 DQ1 I/0 1 DQ2 I DQ3 I/0 3 DQ4 I/0 4 DQ5 I/0 5 DQ6 I/0 6 DQ7 I/0 7 DQS1 UDQS DM1 UDM DQ0 I/0 8 DQ1 I/0 9 DQ2 I/0 10 DQ3 I/0 11 DQ4 I/0 12 DQ5 I/0 13 DQ6 I/0 14 DQ7 I/0 15 DQS2 LDQS S DM2 LDM DQ0 I/0 0 DQ1 I/0 1 DQ2 I DQ3 I/0 3 DQ4 I/0 4 DQ5 ...
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... M470L3224DT0 Absolute Maximum Rate Parameter Voltage on any pin relative to V Voltage on V & V supply relative DDQ Storage temperature Power dissipation Short circuit current Note : Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to recommended operating condition. ...
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... M470L3224DT0 DDR SDRAM IDD spec table Symbol B3(DDR333@CL=2.5) IDD0 580 IDD1 720 IDD2P 24 IDD2F 200 IDD2Q 160 IDD3P 280 IDD3N 440 IDD4R 1020 IDD4W 980 IDD5 940 Normal 24 IDD6 Low power 12 IDD7A 1620 * Module IDD was calculated on the basis of component IDD and can be differently measured according to DQ loading cap. ...
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... M470L3224DT0 Input/Output CAPACITANCE Parameter Input capacitance Input capacitance(CKE ) 0 Input capacitance Input capacitance( CLK , CLK 0 Data & DQS input/output capacitance(DQ Input capacitance(DM ~ =0.5*V tt Output Z0=50 C =30pF LOAD Output Load Circuit (SSTL_2) (V =2.5V, V =2.5V DDQ A Symbol ~ BA ,RAS,CAS ...
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... M470L3224DT0 AC Timming Parameters & Specifications Parameter Row cycle time Refresh row cycle time Row active time RAS to CAS delay Row precharge time Row active to Row active delay Write recovery time Last data in to Read command Col. address to Col. address delay CL=2.0 Clock cycle time CL=2 ...
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... M470L3224DT0 Parameter Mode register set cycle time DQ & DM setup time to DQS DQ & DM hold time to DQS Control & Address input pulse width DQ & DM input pulse width Power down exit time Exit self refresh to non-Read command Exit self refresh to read command Refresh interval time ...
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... M470L3224DT0 8. I/O Setup/Hold Plateau Derating I/O Input Level (mV) 280 This derating table is used to increase tDS/tDH in the case where the input level is flat below VREF up to 2ns. 9. I/O Delta Rise/Fall Rate(1/slew-rate) Derating Delta Rise/Fall Rate (ns/V) 0 0.25 0.5 This derating table is used to increase t is calated as 1/SlewRate1-1/SlewRate2. For example, if slew rate 1 = 5V/ns and slew rate 2 =.4V/ns then the Delta Rise/Fall Rate =-0/5ns/V ...
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... M470L3224DT0 Command Truth Table COMMAND Register Extended MRS Register Mode Register Set Auto Refresh Refresh Self Refresh Bank Active & Row Addr. Read & Auto Precharge Disable Column Address Auto Precharge Enable Write & Auto Precharge Disable Column Address Auto Precharge Enable ...
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... M470L3224DT0 PACKAGE DIMENSIONS 0.16 0.039 (4.00 0.10) 1 0.086 2.15 0.098 2.45 2 0.150 Max (3.80 Max) 0.04 0.0039 (1.00 0.10) Tolerances : .006(.15) unless otherwise specified The used device is 16Mx16 SDRAM, TSOP SDRAM Part No. : K4H561638D 2.70 (67.60) 2.50 (63.60 0.456 1.896 11.40 (47.40) 0.17 (4.20) 0.096 (2.40) 0.07 (1. 0.04 0.0039 (1.00 0.1) Detail Z 200pin DDR SDRAM SODIMM Units : Inches (Millimeters) 199 2- 0.07 (1.80) Y 200 ...