m470t5663eh3 Samsung Semiconductor, Inc., m470t5663eh3 Datasheet - Page 4
![no-image](/images/no-image-200.jpg)
m470t5663eh3
Manufacturer Part Number
m470t5663eh3
Description
Ddr2 Unbuffered Sodimm
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.M470T5663EH3.pdf
(22 pages)
1.0 DDR2 Unbuffered SODIMM Ordering Information
2.0 Features
3.0 Address Configuration
SODIMM
Note :
1. “H” of Part number(12th digit) stands for Lead-Free, Halogen-Free, and RoHS compliant products.
2. “3” of Part number(13th digit) stands for Dummy Pad PCB products.
Note : For detailed DDR2 SDRAM operation, please refer to Samsung’s Device operation & Timing diagram.
• Performance range
• JEDEC standard V
• V
• 333MHz f
• 8 Banks
• Posted CAS
• Programmable CAS Latency: 3, 4, 5, 6
• Programmable Additive Latency: 0, 1 , 2 , 3, 4, 5
• Write Latency(WL) = Read Latency(RL) -1
• Burst Length: 4 , 8(Interleave/Nibble sequential)
• Programmable Sequential / Interleave Burst Mode
• Bi-directional Differential Data-Strobe (Single-ended data-strobe is an optional feature)
• Off-Chip Driver(OCD) Impedance Adjustment
• On Die Termination with selectable values(50/75/150 ohms or disable)
• Average Refresh Period 7.8us at lower than a T
• Package: 60ball FBGA - 128Mx8 and 84ball FBGA - 64Mx16
• All of base components are Lead-Free, Halogen-Free, and RoHS compliant
CL-tRCD-tRP
Speed@CL3
Speed@CL4
Speed@CL5
Speed@CL6
M470T5663EH3-C(L)E7/F7/E6
M470T2864EH3-C(L)E7/F7/E6
M470T2863EH3-C(L)E7/F7/E6
M470T6464EHS-C(L)E7/F7/E6
-
DDQ
Support High Temperature Self-Refresh rate enable feature
128Mx8(1Gb) based Module
64Mx16(1Gb) based Module
= 1.8V ± 0.1V
Part Number
Organization
CK
for 667Mb/sec/pin, 400MHz f
E7 (DDR2-800)
DD
5-5-5
400
533
800
= 1.8V ± 0.1V Power Supply
-
Density
512MB
2GB
1GB
1GB
F7 (DDR2-800)
Row Address
6-6-6
533
667
800
CK
A0-A13
A0-A12
-
Organization
for 800Mb/sec/pin
256Mx64
128Mx64
128Mx64
64Mx64
CASE
85°C, 3.9us at 85°C < T
E6 (DDR2-667)
4 of 22
Column Address
5-5-5
128Mx8(K4T1G084QE-HC(L)E7/F7/E6)*16
64Mx16(K4T1G164QE-HC(L)E7/F7/E6)*8
128Mx8(K4T1G084QE-HC(L)E7/F7/E6)*8
64Mx16(K4T1G164QE-HC(L)E7/F7/E6)*4
400
533
667
-
A0-A9
A0-A9
Component Composition
CASE
Mbps
Mbps
Mbps
Mbps
Unit
CK
< 95 °C
Bank Address
BA0-BA2
BA0-BA2
Rev. 1.0 August 2008
DDR2 SDRAM
Number of Rank Height
Auto Precharge
2
2
1
1
A10
A10
30mm
30mm
30mm
30mm