hys64t256020eu-2.5-c4 Qimonda, hys64t256020eu-2.5-c4 Datasheet - Page 11

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hys64t256020eu-2.5-c4

Manufacturer Part Number
hys64t256020eu-2.5-c4
Description
240-pin Unbuffered Ddr2 Sdram Modules
Manufacturer
Qimonda
Datasheet
Rev. 0.50, 2008-07
07252008-KER5-31MS
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Abbreviation
SSTL
LV-CMOS
CMOS
OD
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tri-state,
and allows multiple devices to share as a wire-OR.
11
Unbuffered DDR2 SDRAM Modules
Abbreviations for Buffer Type
HYS[64/72]T256020EU–2.5–C4
Abbreviations for Pin Type
Advance Internet Data Sheet
TABLE 6
TABLE 7

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