hys64v8000gu-10 Infineon Technologies Corporation, hys64v8000gu-10 Datasheet - Page 10
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hys64v8000gu-10
Manufacturer Part Number
hys64v8000gu-10
Description
3.3v 72-bit Sdram Module
Manufacturer
Infineon Technologies Corporation
Datasheet
1.HYS64V8000GU-10.pdf
(11 pages)
A serial presence detect storage device - E
about the module configuration, speed, etc. is written into the E
production using a serial presence detect protocol ( I
SPD-Table:
Semiconductor Group
Byte#
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
0
1
2
3
4
5
6
7
8
9
Number of SPD bytes
Total bytes in Serial PD
Memory Type
Number of Row Addresses (without BS bits)
Number of Column Addresses (for x 8
SDRAM)
Number of DIMM Banks
Module Data Width
Module Data Width (cont’ d)
Module Interface Levels
SDRAM Cycle Time at CL=3
SDRAM Access time from Clock at CL=3
Dimm Config (Error Det/Corr.)
Refresh Rate/Type
SDRAM width, Primary
Error Checking SDRAM data width
Minimum clock delay for back-to-back ran-
dom column address
Burst Length supported
Number of internal SDRAM banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM module attributes
SDRAM Device Attributes :General
SDRAM Cycle Time at CL = 2
SDRAM Acces TIme from Clock at CL=2
SDRAM Cycle Time at CL = 1
SDRAM Acces TIme from Clock at CL=1
Minimum Row Precharge Time
Minimum Row Active to Row Active delay
tRRD
Description
2
PROM - is assembled onto the module. Information
10
2
C synchronous 2-wire bus)
non buffered/non reg.
Self-Refresh, 15.6 s
1, 2, 4, 8 & full page
CAS latencies = 2,3
SPD Entry Value
Write latency = 0
Vcc tol +/- 10%
CS latency = 0
not supported
not supported
t
none / ECC
ccd
8M x 64/72 SDRAM-Module
SDRAM
n/a / x8
64 / 72
LVTTL
7.0 ns
8.0 ns
30 ns
20 ns
2
10 ns
15 ns
= 1 CLK
128
256
PROM device during module
12
x8
9
1
0
4
HYS64(72)V8000GU-10
Hex
x64
-10
0C
A0
FF
FF
1E
80
08
04
09
01
40
00
01
70
00
80
08
00
01
8F
04
06
01
01
00
06
F0
80
14
x72
-10
0C
A0
FF
FF
1E
80
08
04
09
01
48
00
01
70
02
80
08
01
8F
04
01
01
00
F0
80
14
08
06
06