m471b5273bh1 Samsung Semiconductor, Inc., m471b5273bh1 Datasheet - Page 20

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m471b5273bh1

Manufacturer Part Number
m471b5273bh1
Description
Ddr3 Sdram
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
14.0 Electrical Characteristics and AC timing
14.1 Refresh Parameters by Device Density
Note :
1. Users should refer to the DRAM supplier data sheet and/or the DIMM SPD to determine if DDR3 SDRAM devices support the following options or
14.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin
Unbuffered SoDIMM
All Bank Refresh to active/refresh cmd time
Average periodic refresh interval
requirements referred to in this material.
(0 °C<T
Bin (CL - tRCD - tRP)
CASE
Parameter
Speed
tRCD
tRRD
tRAS
tFAW
tRC
tRP
CL
Parameter
≤95 °C, V
DDQ
= 1.5V ± 0.075V; V
DDR3-1066
tREFI
13.13
13.13
50.63
7-7-7
37.5
37.5
min
7.5
7
DD
85 °C < T
0 °C ≤ T
= 1.5V ± 0.075V)
Symbol
tRFC
20 of 28
CASE
CASE
≤ 85°C
≤ 95°C
DDR3-1333
9-9-9
1Gb
13.5
13.5
49.5
min
110
7.8
3.9
6.0
36
30
9
2Gb
160
7.8
3.9
Rev. 1.0 December 2008
4Gb
300
7.8
3.9
Units
tCK
ns
ns
ns
ns
ns
ns
DDR3 SDRAM
8Gb
350
7.8
3.9
Units
ns
µs
µs
Note
Note
1

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