edi8l24129v White Electronic Designs Corporation, edi8l24129v Datasheet
edi8l24129v
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edi8l24129v Summary of contents
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... The EDI8L24129VxxBC is a 3.3V, three megabit SRAM constructed with three 128Kx8 die mounted on a multi- layer laminate substrate. With 10 to 15ns access times, x24 width and a 3.3V operating voltage, the EDI8L24129V is ideal for creating a single chip memory solution for the Motorola DSP5630x (Figure two chip solution for the Analog Devices SHARCTM DSP (Figure 4) ...
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... I ,I Address Lines CC2 CC3 High Z I Data Lines CC1 DOUT I Write & Output Enable Lines CC1 DIN I Chip Enable Lines CC1 These parameters are sampled, not 100% tested. 2 EDI8L24129V Sym Min Typ Max V 3.135 3 ...
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... -4.0mA 8.0mA 50Ω =1.5V L (NOTE: For t 30pf 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com EDI8L24129V Max Min 10ns 12-15ns 420 360 ±10 ±10 ±10 ±10 2.4 0.4 0.4 AC TEST CONDITIONS Input Pulse Levels V to 3.0V ...
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... AVAV ADDRESS 1 ADDRESS AVQV AVQX DATA 1 READ CYCLE 2 – W# HIGH t AVAV t AVQV t ELQV t ELQX t GLQV t GLQX 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com EDI8L24129V 12ns 15ns Min Max Min Max ...
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... WLQZ WHZ DVWH DVEH WHQX WLZ WRITE CYCLE – W# CONTROLLED t AVAV t ELWH t AVWH t WLWH t AVWL t WLQZ 5 EDI8L24129V 12ns 15ns Min Max Min Max ...
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... White Electronic Designs Corp. reserves the right to change products or specifi cations without notice. March 2005 Rev. 5 WRITE CYCLE 2 – E# CONTROLLED t AVAV t t AVEL ELEH t AVEH t WLEH t DVEH DATA VALID HIGH Z 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com EDI8L24129V t EHAX t EHDX ...
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... NOM./0.110 MAX. 0.050 TYP 0.300 BSC ORDERING INFORMATION Industrial (-40°C to +85°C) Package Part Number No. 391 EDI8L24129V10BI 391 EDI8L24129V12BI 391 EDI8L24129V15BI 7 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com EDI8L24129V 0.028 MAX. Speed Package (ns) No. 10 391 12 391 15 391 ...
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... Any combination of AA0-AA3 may be used as chip selects. However, each chip select may only be used to select one memory array. FIGURE 4 – INTERFACING THE 21060L OR THE 21062L TO THE EDI8L24129V, 119 BGA (CREATING A 128KX48 MEMORY ARRAY) Address Bus ...