gd16571 ETC-unknow, gd16571 Datasheet - Page 3

• Manufacturer Part Number: gd16571
• Description: 2.5 Gbit/s Retiming Laser Driver
• Manufacturer: ETC-unknow

Pin List
Data Sheet Rev.: 10
Mnemonic:
DIN
DINQ
DINT
CKIN
CKINQ
CKINT
IOUT
IOUTN
IPRE
VMOD
VPRE
CKSEL
SYM
MARKP
MARKN
VADJBUF
VADJEF
VDD
VDDCONT
VDDR
VEE
VEEP
VEEB
VEER
NC
Heat sink
Package back
2, 4, 10, 15
Pin No.:
5, 8, 23
13, 14
11, 12
27
26
28
31
32
30
19
20
16
24
22
21
29
18
17
25
1
7
6
3
9
COLLECTOR
COLLECTOR
Pin Type:
ANL OUT
ANL IN
ANL IN
ANL IN
ANL IN
ECL IN
ANL IN
ANL IN
OPEN
OPEN
AC IN
AC IN
PWR
PWR
PWR
PWR
PWR
PWR
PWR
GD16571
current mirror. VMOD sinks a current proportional to the modula-
tion current. This current is approximately 3/80 times “The modu-
lation current”.
current mirror. VPRE sinks a current proportional to the pre-bias
current. This current is approximately 3/500 times “The pre-bias
current”.
the retiming.
SYM controls the mark-space ratio of the output. Decreasing the
voltage of the SYM pin decreases the pulse width of a current
high into the IOUT pin.
Mark-space monitor outputs. High impedance CML outputs. The
output voltage of the MARKP pin is the same as the voltage on
the DIN input.
Pins used to optimise the performance of the output in terms of
overshoot and undershoot. Typically optimum performance will be
achieved when shorted to VMOD.
Ground pins for laser driver part.
Ground pin for modulation current control system.
Ground pin for retiming part.
Negative supply pins for laser driver part.
Negative supply pin for output driver.
Negative supply pin for pre-bias circuitry.
Negative supply pin for retiming part.
Not Connected.
Connected to VEE.
Description:
Data inputs. Internally terminated in 50 W to DINT.
Internally biased to -1.3 V
Termination voltage for DIN and DINQ.
Clock inputs. Internally terminated in 50 W to CKINT.
Internally biased to -1.3 V.
Termination voltage for CKIN and CKINQ.
Laser Driver Output (2.5 Gbit/s). IOUT and IOUTN sink a modula-
tion current, which is controlled by the pin VMOD. The current into
IOUT is high when data is high on DIN.
Pre-bias current output. IPRE sinks a current, which is controlled
by the pin VPRE.
Modulation current control input. The control system is made as a
Pre-bias current control input. The control system is made as a
When CKSEL is low data is retimed. Otherwise data is bypassed
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