atr0625 ATMEL Corporation, atr0625 Datasheet - Page 8

• Manufacturer Part Number: atr0625
• Description: Gps Baseband Processor Supersense
• Manufacturer: ATMEL Corporation

Table 3-2.
8
Note:
JTAG/ICE
LDOBAT
POWER
Module
CLOCK
RESET
LDO18
1. The USB transceiver is disabled if VDD_USB < 2.0V. In this case the pins USB_DM and USB_DP are connected to GND
ATR0625 [Preliminary]
(internal pull-down resistors). The USB transceiver is enabled if VDD_USB is within 3.0V and 3.6V.
ATR0625 Signal Description (Continued)
MCLK_OUT
LDOBAT_IN
VDD_USB
LDO_OUT
DBG_EN
NRESET
LDO_EN
VBAT18
LDO_IN
NTRST
VDD18
VDDIO
CLK23
Name
VBAT
TMS
TDO
GND
TCK
TDI
Function
Test Mode Select
Test Data In
Test Data Out
Test Clock
Test Reset Input
Debug Enable
Clock Input
Master Clock Output
Reset Input
LDO In
LDO Out
LDO Enable
Output
Output
Power
Power
Power
Power
Power
Power
Power
Power
Type
Input
Input
Input
Input
Input
Input
Input
Out
I/O
Active Level Comment
High
Low
Low
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Internal pull-up resistor
Internal pull-up resistor
Internal pull-up resistor
Internal pull-down resistor
Internal pull-down resistor
Interface to ATR0601,
Schmitt trigger input
PIO-controlled after reset
Open drain with internal pull-up
resistor
Core voltage 1.8V
Variable IO voltage 1.65V to 3.6V
USB voltage 0 to 2.0V or
3.0V to 3.6V
Ground
2.3V to 3.6V
1.5V to 3.6V
1.8V backup voltage
2.3V to 3.6V
1.8V core voltage, max. 80 mA
(1)
4925A–GPS–02/06