54abt16374 National Semiconductor Corporation, 54abt16374 Datasheet

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54abt16374

Manufacturer Part Number
54abt16374
Description
16-bit D Flip-flop With Tri-state Outputs
Manufacturer
National Semiconductor Corporation
Datasheet
© 2004 National Semiconductor Corporation
54ABT16374
16-Bit D Flip-Flop with TRI-STATE
General Description
The ABT16374 contains sixteen non-inverting D flip-flops
with TRI-STATE outputs and is intended for bus oriented
applications. The device is byte controlled. A buffered clock
(CP) and Output Enable (OE) are common to each byte and
can be shorted together for full 16-bit operation.
Ordering Code:
Connection Diagram
TRI-STATE
54ABT16374W-QML
®
is a registered trademark of National Semiconductor Corporation.
Commercial
Pin Assignment for Cerpack
DS100224-2
WA48A
Package
Number
DS100224
48-Lead Cerpack
Features
n Separate control logic for each byte
n 16-bit version of the ABT374
n Edge-triggered D-type inputs
n Buffered Positive edge-triggered clock
n High impedance glitch free bus loading during entire
n Non-destructive hot insertion capability
n Guaranteed latch-up protection
n Standard Microcircuit Drawing (SMD) 5962-9320101
Logic Symbol
Pin Description
OE
CP
D
O
Names
power up and power down cycle
0
0
–D
Pin
–O
n
n
15
15
®
Package Description
Outputs
TRI-STATE Output Enable Input (Active Low)
Clock Pulse Input (Active Rising Edge)
Data Inputs
TRI-STATE Outputs
Description
www.national.com
July 1998
DS100224-1

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54abt16374 Summary of contents

Page 1

... TRI-STATE outputs and is intended for bus oriented applications. The device is byte controlled. A buffered clock (CP) and Output Enable (OE) are common to each byte and can be shorted together for full 16-bit operation. Ordering Code: Commercial 54ABT16374W-QML Connection Diagram Pin Assignment for Cerpack DS100224-2 TRI-STATE is a registered trademark of National Semiconductor Corporation. ...

Page 2

Functional Description The ABT16374 consists of sixteen edge-triggered flip-flops with individual D-type inputs and TRI-STATE true outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to ...

Page 3

Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Ceramic V Pin Potential to CC Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State ...

Page 4

DC Electrical Characteristics Symbol Parameter V Quiet Output Maximum Dynamic V OLP V Quiet Output Minimum Dynamic V OLV Note 5: Max number of outputs defined as (n). n − 1 data inputs are driven 0V to 3V. One output ...

Page 5

AC Loading * Includes jig and probe capacitance FIGURE 1. Standard AC Test Load FIGURE 2. Propagation Delay Waveforms for Inverting and Non-Inverting Functions FIGURE 3. Test Input Pulse Requirements Amplitude Rep Rate t W 3.0V 1 MHz 500 ns ...

Page 6

... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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