adsst-em-3041 Analog Devices, Inc., adsst-em-3041 Datasheet
adsst-em-3041
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adsst-em-3041 Summary of contents
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... Ordering Guide for separate ordering number.) GENERAL DESCRIPTION The ADSST-SALEM-3T energy meter chipset consists of an efficient ADSST-218x digital signal processor (DSP), a fast and accurate 6-channel, 16-bit ADSST-73360LAR sigma-delta ana- log-to-digital converter (ADC), and metering software. Two chipset versions are available to support differing ranges of operating temperature: The ADSST-EM-3040 chipset is rated at 0° ...
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... ADSST-SALEM-3T TABLE OF CONTENTS Easy Calibration............................................................................ 3 Effective Phase Compensation ................................................... 3 Ease of Design............................................................................... 3 Quadrant and Other Conventions ............................................. 3 General Description of the ADSST-218x DSP ......................... 4 Architecture Overview ................................................................ 4 ADSST-218x Common-Mode Pins ........................................... 6 Clock Signals ................................................................................. 7 RESET ............................................................................................ 7 Recommended Operating Conditions ...................................... 7 ADSST-218x Electrical Characteristics ......................................... 8 Absolute Maximum Ratings—ADSST-218x................................. 9 ESD Caution.................................................................................. 9 Pin Configuration—ADSST-218x................................................ 10 REVISION HISTORY 7/04— ...
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... Ease of calibration is the key feature in this chipset. By sending specific commands to the ADSST-SALEM-3T chipset, the dc offsets and gains for all volt- age and current channels can be calibrated automatically. Active and reactive power calibration is also available for fine-tuning the errors ...
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... DMA port, a programmable timer, flag I/O, exten- sive interrupt capabilities, and on-chip program and data memory. The ADSST-218x is fabricated in a high speed, low power CMOS process. Every instruction can execute in a single proc- essor cycle. The ADSST-218x’s flexible architecture and comprehensive instruction set enable the processor to perform multiple opera- tions in parallel ...
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... Serial Ports The ADSST-218x incorporates two complete synchronous serial ports (SPORT0 and SPORT1) for serial communications and multiprocessor communication. Package Description The ADSST-218x is available in a 100-lead low profile quad flat package (LQFP, refer to Figure 5). Rev Page ADSST-SALEM-3T ...
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... ADSST-SALEM-3T ADSST-218X COMMON-MODE PINS Table 2. Pin Name No. of Pins BG 1 BGH 1 BMS CMS 1 DMS 1 1 IOMS PMS RESET IRQ2/ 1 PF7 IRQL1/ 1 PF6 IRQL0/ 1 PF5 IRQE/ 1 PF4 MODE A 1 PF0 MODE B 1 PF1 MODE C 1 PF2 MODE D 1 PF3 ...
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... DDINT 03738- 0- 003 V DDEXT 1 V INPUT T AMB 1 The ADSST-2185x is 3.3 V tolerant (always accepts up to 3.6 V max V voltage compliance (on output (MAX RFS1, SCLK0, SCLK1, TFS0, A1–A13, PF0–PF7) and input only pins (CLKIN, RESET , BR , DR0, DR1, PWD ). Rev Page ADSST-SALEM-3T . ...
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... Three-statable pins: A0–A13, D0–D23, PMS , DMS , BMS , IOMS , CMS , DT0, DT1, SCLK0, SCLK1, TFS0, TFS1, RFS0, RFS1, PF0–PF7 Idle refers to ADSST-218x state of operation during execution of IDLE instruction. Deasserted pins are driven to either measurement taken with all instructions executing from internal memory. 50% of the instructions are multifunction (Types 12, 13, 14), 30% are Type 2 and DD Type 6, and 20% are idle instructions ...
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... ABSOLUTE MAXIMUM RATINGS—ADSST-218X Table 5. Parameter Min Internal Supply Voltage (V ) –0.3 V DDINT External Supply Voltage (V ) –0.3 V DDEXT 1 Input Voltage –0.3 V Output Voltage Swing 2 –0.5 V Operating Temperature Range 0°C Storage Temperature Range –65°C 1 Applies to bidirectional pins (D0–D23, RFS0, RFS1, SCLK0, SCLK1, TFS0, TFS1, A1– ...
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... GND DDINT BMS 21 DMS 22 23 PMS IOMS 24 25 CMS PIN 1 IDENTIFIER ADSST-218x TOP VIEW (Not to Scale) Figure 5. Pin Configuration for ADSST-218x in 100-Lead LQFP Rev Page D15 74 D14 73 D13 72 D12 71 GND 70 D11 69 D10 DDEXT 66 GND 65 ...
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... GENERAL DESCRIPTION OF THE ADSST-73360LAR ADC The ADSST-73360LAR is a 6-channel input analog front end processor for general-purpose applications, including industrial power metering or multichannel analog inputs. It features six 16-bit A/D conversion channels, each of which provides 76 dB signal-to-noise ratio over kHz signal bandwidth. Each channel also features an input programmable gain amplifier (PGA) with gain settings in eight stages from ...
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... ADSST-SALEM-3T SPECIFICATIONS—ADSST-73360LAR (AVDD = 2 3.6 V, DVDD = 2 3.6 V, DGND = AGND = unless otherwise noted.) MAX Table 6. Parameter REFERENCE REFCAP Absolute Voltage, V REFCAP REFCAP TC REFOUT Typical Output Impedance Absolute Voltage, V REFOUT Minimum Load Resistance Maximum Load Capacitance ADC SPECIFICATIONS 2, 3 Maximum Input Range at VIN ...
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... MAX SE MCLK ON 1 Yes Yes 1 Yes 0 No Rev Page ADSST-SALEM-3T Test Conditions | ≤ 100 µA |I OUT | ≤ 100 µA |I OUT See Table 7 11 )/DMCLK. Comments REFOUT Disabled REFOUT Disabled REFOUT Enabled MCLK Active Levels Equal and DVDD ...
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... ADSST-SALEM-3T ABSOLUTE MAXIMUM RATINGS—ADSST-73360LAR (T = 25°C unless otherwise noted) A Table 8. Parameter AVDD, DVDD to GND AGND to DGND Digital I/O Voltage to DGND Analog I/O Voltage to AGND Operating Temperature Range Storage Temperature Range Maximum Junction Temperature Thermal Impedance θ (SOIC) JA Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only ...
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... SCLK period before the first bit (MSB) of each input word. SDIFS is sampled on the negative edge of SCLK and is ignored when SE is low. 17 SDI Serial Data Input of the ADSST-73360LAR. Both data and control information may be input on this pin and are clocked on the negative edge of SCLK. SDI is ignored when SE is low. VINP2 VINN3 ...
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... However, because the resolution of the ADSST-73360LAR’s ADC is high and the noise levels from the ADSST-73360LAR are so low, care must be taken with regard to grounding and layout. The printed circuit board that houses the ADSST-73360LAR ...
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... V to 4.14 V p-p. This limit defines the resistance network on the potential circuits and the burden resistance on the sec- ondary side of the CT. Since the ADSST-73360LAR is a unipolar ADC, the ac potential and current signals have to be offset by some dc level. The reference design has a dc offset of 2.5 V. This limits the peak-to-peak signal range of potential and current to 3 ...
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... ADSST-SALEM-3T ACCURACY OF REFERENCE DESIGN USING THE ADSST-SALEM-3T CHIPSET Overall Accuracy, Power, and Energy Measurement The accuracy figures are measured under typical specified conditions, unless otherwise indicated. Table 10. Test Conditions for Reference Design Using a µ Metal CT of Class 0.5 Accuracy Parameter Nominal Voltage (Phase to Neutral) V ...
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... Table 17. Voltage Unbalance Error Current Voltage 15 Table 18. Starting Current Min Typ 0.07 Min Typ ±0.1 Max 0.1 Rev Page ADSST-SALEM-3T Max Unit ±0.2 % Unit % ...
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... ADSST-SALEM-3T OUTLINE DIMENSIONS 10° 6° 1.45 2° 1.40 1.35 0.15 SEATING 0.05 PLANE VIEW A ROTATED 90° CCW 0.30 (0.0118) 0.10 (0.0039) COPLANARITY 0.10 1.60 MAX 0.75 100 12° 1 0.60 TYP 0.45 SEATING PLANE 0.20 0.09 VIEW A 7° 3.5° 25 0° 26 0.08 MAX 0.50 BSC COPLANARITY COMPLIANT TO JEDEC STANDARDS MS-026BED Figure 10. 100-Lead Low Profile Quad Flat Package [LQFP] ...
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... ORDERING GUIDE 1 Part Number Temperature Range ADSST-EM-3040 0°C to +70°C ADSST-EM-3041 −25°C to +85°C 1 For developer’s kit, order ADSST-SALEM-3T-DK. Processors Included ADSST-2185MKST-300 ADSST-73360LAR ADSST-2185MBST-266 ADSST-73360LAR Rev Page ADSST-SALEM-3T Package ST-100 RW-28 ST-100 RW-28 ...
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... ADSST-SALEM-3T NOTES Rev Page ...
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... NOTES Rev Page ADSST-SALEM-3T ...
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... ADSST-SALEM-3T NOTES © 2004 Analog Devices, Inc. All rights reserved. Trademarks and regis- tered trademarks are the property of their respective owners. D03738–0–7/04(0) Rev Page ...