k4m51323pc Samsung Semiconductor, Inc., k4m51323pc Datasheet - Page 10
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k4m51323pc
Manufacturer Part Number
k4m51323pc
Description
4m X 32bit X 4 Banks Mobile Sdram In 90fbga
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.K4M51323PC.pdf
(12 pages)
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K4M51323PC-S(D)E/G/C/F
A. MODE REGISTER FIELD TABLE TO PROGRAM MODES
Register Programmed with Normal MRS
Normal MRS Mode
Register Programmed with Extended MRS
EMRS for PASR(Partial Array Self Ref.) & DS(Driver Strength)
NOTES:
1. RFU(Reserved for future use) should stay "0" during MRS cycle.
2. If A9 is high during MRS cycle, "Burst Read Single Bit Write" function will be enabled.
3. Full Page Length : x32 : 64Mb(256) , 128Mb (256), 256Mb (512), 512Mb (512)
4. Mobile SDRAM supports PASR of full array, 1/2 of full array and 1/4 of full array.
Function
Function
A8
A9
Address
Address
0
0
1
1
0
1
BA1
A12~A10/AP
0
0
1
1
Write Burst Length
A7
0
1
0
1
0
Test Mode
BA0
Mode Register Set
0
1
0
1
Single Bit
BA1
Mode Select
Length
"0" Setting for
Normal MRS
Burst
BA0 ~ BA1
Reserved
Reserved
Reserved
Type
Mode Select
BA0
EMRS for Mobile SDRAM
A9
0
Normal MRS
A12 ~ A10/AP
Reserved
Reserved
Mode
A6
Reserved Address
0
0
0
0
1
1
1
1
A12 ~ A10/AP
A8
0
RFU
A5
0
0
1
1
0
0
1
1
CAS Latency
*1
A4
0
1
0
1
0
1
0
1
RFU
A9
A7
*1
0
Reserved
Reserved
Reserved
Reserved
Reserved
Latency
W.B.L
A9
A6
0
0
1
1
1
2
3
*2
A8
A5
0
1
0
1
Driver Strength
A8
Test Mode
BA1 BA0
A3
A4
0
1
0
0
A7
Mode Select
Driver Strength
Burst Type
A7
0
Sequential
Interleave
A6
Full
Type
1/2
1/4
1/8
mal MRS
for Nor-
A6
Setting
DS
Mode
A3
0
CAS Latency
A5
A5
A2
0
0
0
0
1
1
1
1
A2
A4
0
0
0
0
1
1
1
1
RFU
A4
A1
0
0
1
1
0
0
1
1
A1
*1
0
0
1
1
0
0
1
1
A3
Mobile-SDRAM
A0
A3
BT
Burst Length
0
1
0
1
0
1
0
1
PASR
A0
0
1
0
1
0
1
0
1
Full Page
Reserved
Reserved
Reserved
A2
BT=0
A2
1
2
4
8
*4
1/2 of Full Array
1/4 of Full Array
Burst Length
# of Banks
February 2006
PASR
Full Array
Reserved
Reserved
Reserved
Reserved
Reserved
*3
A1
A1
Reserved
Reserved
Reserved
Reserved
BT=1
1
2
4
8
A0
A0