ia3513 integration, ia3513 Datasheet - Page 30

• Manufacturer Part Number: ia3513
• Description: Headset Voice And Power Solution
• Manufacturer: integration

Register 1 - PCM Codec Register – Gain 1
Register 2 - PCM Codec Register – Gain 2
Note: The sidetone processing is done in the digital block, the TX signal that is fed into the RX channel will be affected by the
Register 3 - PCM Interface Register – Status /Control
Dc- Read only bits which are don’t care bits and will have no effect if written.
Register 4 - PCM Interface Register – TX serial data offset
D[7:5]
D[4:3]
D[1:0]
D[7:4]
D[3:0]
D[6:5]
D[7:0]
Default Values
D[2]
Default Values
Default Values
D[4]
Default Values
Bit
Bit
Bit
Bit
Read/Write
Read/Write
Read/Write
Read/Write
RX gain.
Name
Name
Name
Name
Bit
Bit
Bit
Bit
RSTDF
Name
Name
Name
Name
RAG
RDG
TDG
TAG
STG
CFR
TOF
TE
Functions
Receive Analog gain control 0->-24 dB 100->0 6dB steps
Receive Digital gain control 0->-3 dB 11->6dB 3dB steps
Reset to the digital filters (write 1 to issue a reset pulse)
Transmit Digital gain control 0->0dB 10->+2dB 1dB steps
Functions
Transmit Analog gain control 0->0dB 1000->+24 3dB steps
Side tone gain control 0->-30dB 1010->0 3dB steps
Functions
PCM_CLK to PCM_SYNC ratio. Ratio 00-> unknown 01->128 10->256 00->512
Transmit edge 0-> positive 1-> negative
Functions
TX serial data offset
RAG2
TAG3
TOF7
R/W
R/W
R/W
D7
D7
D7
Dc
D7
R
0
0
0
0
RAG1
TAG2
CFR1
TOF6
R/W
R/W
R/W
D6
D6
D6
D6
R
0
0
0
0
RAG0
TAG1
CFR0
TOF5
R/W
R/W
R/W
D5
D5
D5
D5
R
0
0
0
0
RDG1
TAG0
TOF4
R/W
R/W
W/R
R/W
D4
D4
D4
TE
D4
0
0
0
0
RDG0
STG3
TOF3
R/W
R/W
R/W
D3
D3
D3
Dc
D3
R
0
0
0
0
RSTDF
STG2
TOF2
R/W
R/W
D2
D2
D2
D2
Dc
W
R
0
0
0
0
TDG1
STG1
TOF1
R/W
R/W
R/W
D1
D1
D1
D1
Dc
R
0
0
0
0
TDG0
STG0
TOF0
R/W
R/W
R/W
D0
D0
D0
Dc
D0
R
0
0
0
0
IA3513
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