k7i161884b Samsung Semiconductor, Inc., k7i161884b Datasheet - Page 14

• Manufacturer Part Number: k7i161884b
• Description: 512kx36-bit, 1mx18-bit Ddrii Cio B4 Sram
• Manufacturer: Samsung Semiconductor, Inc.

R/W
K7I161884B
K7I163684B
TIMING WAVE FORMS OF READ, WRITE AND NOP
LD
K
K
SA
DQ
C
C
CQ
CQ
1
NOP
NOTE
1. Q
2. Outputs are disabled (High-Z) one clock cycle after a NOP.
3. The second NOP cycle is not necessary for correct device operation; however, at high clock frequencies, it may be required to prevent
t
t
AVKH
IVKH
bus contention.
t
KHCH
01
t
t
KLKH
refers to output from address A. Q
KHKL
READ
(burst of 4)
A
2
0
t
KHKH
t
t
KHIX
KHAX
t
3
t
CHQX
CHQV
1
READ
(burst of 4)
A
4
1
Q
t
KHKH
01
t
CHQX
02
Q
02
refers to output from the next internal burst address following A, etc.
5
Q
03
t
t
KHKH
KHKL
Q
04
t
CQHQX
NOP
6
t
512Kx36 & 1Mx18 DDRII CIO b4 SRAM
CQHQV
Q
11
- 14 -
Q
12
t
KLKH
NOP
(Note3)
7
t
Q
CQHQZ
13
Q
14
(burst of 4)
WRITE
A
8
2
t
t
CHQZ
KHKH
t
KHDX
t
DVKH
D
9
21
D
22
10
A
D
23
READ
(burst of 4)
3
DON′T CARE
Rev. 5.0 July 2006
t
CHCQH
D
24
11
Q
31
UNDEFINED
12
Q
32
Q
33