k6r1008c1c-c Samsung Semiconductor, Inc., k6r1008c1c-c Datasheet - Page 2

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k6r1008c1c-c

Manufacturer Part Number
k6r1008c1c-c
Description
128kx8 Bit High-speed Cmos Static Ram 5v Operating . Operated At Commercial And Industrial Temperature Ranges.
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
K6R1008C1C-C/C-L, K6R1008C1C-I/C-P
128K x 8 Bit High-Speed CMOS Static RAM(5.0V Operating)
• Fast Access Time 10,12,15ns(Max.)
• Low Power Dissipation
• Single 5.0V 10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
• Three State Outputs
• 2V Minimum Data Retention: L-ver. only
• Center Power/Ground Pin Configuration
• Standard Pin Configuration
CS
WE
OE
A
A
A
A
A
A
A
A
A
- No Clock or Refresh required
Operating K6R1008C1C-10 : 80mA(Max.)
Standby (TTL)
0
1
2
3
4
5
6
7
8
I/O
1
~I/O
8
(CMOS) : 5mA(Max.)
K6R1008C1C-J : 32-SOJ-400
K6R1008C1C-T : 32-TSOP2-400CF
K6R1008C1C-12 : 75mA(Max.)
K6R1008C1C-15 : 73mA(Max.)
Clk Gen.
: 30mA(Max.)
Cont.
0.5mA(Max.) L-ver. only
Data
Gen.
CLK
A
9
A
Pre-Charge Circuit
10
256x8 Columns
Column Select
Memory Array
A
11
512 Rows
I/O Circuit
A
12
A
13
A
14
A
15
A
16
- 2 -
ORDERING INFORMATION
GENERAL DESCRIPTION
PIN CONFIGURATION
PIN FUNCTION
The K6R1008C1C is a 1,048,576-bit high-speed Static Ran-
dom Access Memory organized as 131,072 words by 8 bits.
The K6R1008C1C uses 8 common input and output lines and
has an output enable pin which operates faster than address
access time at read cycle. The device is fabricated using SAM-
SUNG s advanced CMOS process and designed for high-
speed circuit technology. It is particularly well suited for use in
high-density
K6R1008C1C is packaged in a 400mil 32-pin plastic SOJ or
TSOP2 forward.
K6R1008C1C-C10/C12/C15
K6R1008C1C-I10/I12/I15
I/O
Pin Name
A
0
1
V
V
N.C
WE
CS
OE
I/O
I/O
I/O
I/O
- A
Vcc
Vss
WE
CS
~ I/O
A
A
A
A
A
A
A
A
CC
SS
0
1
2
3
4
5
6
7
1
2
3
4
16
10
11
12
13
14
15
16
8
1
2
3
4
5
6
7
8
9
high-speed
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power(+5.0V)
Ground
No Connection
TSOP2
SOJ/
system
(Top View)
Pin Function
CMOS SRAM
Commercial Temp.
Industrial Temp.
applications.
PRELIMINARY
PRELIMINARY
September 2001
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Revision 3.0
A
A
A
A
I/O
I/O
Vss
Vcc
I/O
I/O
A
A
A
OE
A
A
16
15
14
13
12
11
10
9
8
8
7
6
5
The

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