gvt7232a8 ETC-unknow, gvt7232a8 Datasheet - Page 2
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gvt7232a8
Manufacturer Part Number
gvt7232a8
Description
Traditional Pinout Sram
Manufacturer
ETC-unknow
Datasheet
1.GVT7232A8.pdf
(10 pages)
TRUTH TABLE
PIN DESCRIPTIONS
February 5, 1998
Rev. 2/98
READ
WRITE
OUTPUT DISABLE
STANDBY
10, 9, 8, 7, 6, 5, 4,
3, 25, 24, 21, 23,
2, 26, 1
MODE
Pin Numbers
11, 12, 13, 15,
16, 17, 18, 19
GALVANTECH
FUNCTIONAL BLOCK DIAGRAM
A14
27
20
22
28
14
A0
SYMBOL
DQ1-DQ8
A0-A14
WE#
VCC
CE#
OE#
VSS
CE#
H
L
L
L
Output
Supply Power Supply: 5V
Supply Ground
TYPE
Input/
Input
Input
Input
Input
WE#
Addresses Inputs: These inputs determine which cell is addressed.
Write Enable: This input determines if the cycle is a READ or WRITE cycle. WE#
is LOW for a WRITE cycle and HIGH for a READ cycle.
Chip Enable: This input is used to enable the device. When CE# is LOW, the
chip is selected. When either CE# is HIGH, the chip is disabled and
automatically goes into standby power mode.
Output Enable: This active LOW input enables the output drivers.
SRAM Data I/O: Data inputs and data outputs
H
H
X
L
, INC.
COLUMN DECODER
256 ROWS X 128 X 8
OE#
X
H
X
L
MEMORY ARRAY
COLUMNS
+
10%
HIGH-Z
HIGH-Z
DQ
Q
D
TRADITIONAL PINOUT 32K X 8 SRAM
2
DESCRIPTION
STANDBY
ACTIVE
ACTIVE
ACTIVE
POWER
Galvantech, Inc. reserves the right to change products or specifications without notice.
POWER
DOWN
GVT7232A8
VCC
VSS
DQ1
DQ8
CE#
WE#
OE#