NBSG16 ON Semiconductor, NBSG16 Datasheet

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NBSG16

Manufacturer Part Number
NBSG16
Description
Manufacturer
ON Semiconductor
Datasheet

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NBSG16
2.5V/3.3V SiGe Differential
Receiver/Driver with
RSECL* Outputs
*Reduced Swing ECL
frequency applications. The device is functionally equivalent to the
EP16 and LVEP16 devices with much higher bandwidth and lower
EMI capabilities.
NECL (Negative ECL), PECL (Positive ECL), HSTL, LVTTL,
LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced Swing
ECL), 400 mV.
available to this device only. The V
for single-ended NECL or PECL inputs and the V
reference voltage for LVCMOS inputs. For all single-ended input
conditions, the unused complementary differential input is connected
to V
also rebias AC coupled inputs. When used, decouple V
via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.
When not used, V
May, 2003 - Rev. 12
The NBSG16 is a differential receiver/driver targeted for high
Inputs incorporate internal 50 W termination resistors and accept
The V
with V
Operating Range: V
Output Only
Maximum Input Clock Frequency > 12 GHz Typical
Maximum Input Data Rate > 12 Gb/s Typical
120 ps Typical Propagation Delay
40 ps Typical Rise and Fall Times
RSPECL Output with Operating Range: V
RSNECL Output with RSNECL or NECL Inputs with
RSECL Output Level (400 mV Peak-to-Peak Output), Differential
50 W Internal Input Termination Resistors
Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices
V
Semiconductor Components Industries, LLC, 2003
BB
BB
and V
or V
BB
EE
and V
= 0 V
MM
MM
as a switching reference voltage. V
Reference Voltage Output
BB
MM
and V
CC
pins are internally generated voltage supplies
= 0 V with V
MM
outputs should be left open.
BB
EE
is used as a reference voltage
= -2.375 V to -3.465 V
CC
= 2.375 V to 3.465 V
MM
BB
pin is used as a
or V
BB
and V
MM
1
may
MM
NBSG16BA
NBSG16BAR2
NBSG16MN
NBSG16MNR2
NBSG16BAEVB
Board
*For further details, refer to Application Note
AND8002/D
Device
CASE 485G
BA SUFFIX
MN SUFFIX
FCBGA-16
CASE 489
QFN-16
ORDERING INFORMATION
http://onsemi.com
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
NBSG16BA Evaluation Board
FCBGA-16
FCBGA-16
Package
QFN-16
QFN-16
4x4 mm
4x4 mm
3x3 mm
3x3 mm
Publication Order Number:
Description
DIAGRAM*
MARKING
3000/Tape & Reel
500/Tape & Reel
ALYW
SG16
100 Units/Tray
123 Units/Rail
LYW
SG
16
Shipping
NBSG16/D

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NBSG16 Summary of contents

Page 1

... SiGe Differential Receiver/Driver with RSECL* Outputs *Reduced Swing ECL The NBSG16 is a differential receiver/driver targeted for high frequency applications. The device is functionally equivalent to the EP16 and LVEP16 devices with much higher bandwidth and lower EMI capabilities. Inputs incorporate internal 50 W termination resistors and accept NECL (Negative ECL), PECL (Positive ECL), HSTL, LVTTL, LVCMOS, CML, or LVDS ...

Page 2

... Inverted Differential Output. Typically Terminated with LVCMOS Reference Voltage Output ECL Reference Voltage Output - Exposed Pad. (Note 2) http://onsemi.com Exposed Pad (EP NBSG16 Description and 36 ...

Page 3

... VTD Figure 3. Logic Diagram Table 2. Interfacing Options INTERFACING OPTIONS CML LVDS AC-COUPLED RSECL, PECL, NECL LVTTL LVCMOS http://onsemi.com NBSG16 36 CONNECTIONS Connect VTD and VTD to V Connect VTD and VTD together ...

Page 4

... Maximum Ratings are those values beyond which device damage may occur. 3. JEDEC standard multilayer board - 1S2P (1 signal, 2 power) 4. JEDEC standard multilayer board - 2S2P (2 signal, 2 power) with 8 filled thermal vias under exposed pad. NBSG16 Characteristics Human Body Model Machine Model FCBGA-16 ...

Page 5

... All loading with 2 11 the voltage applied to the complementary input, typically V THR 12. V min varies 1:1 with IHCMR EE IHCMR input signal. *Typicals used for testing purposes. NBSG16 -40 C Min Typ Max Min 1450 1530 ...

Page 6

... Measured using a 400 mV source, 50% duty cycle clock source. All loading with 19. See Figure for a nominal 50% differential clock input waveform. skew PLH PHL 20. V cannot exceed INPP(max NBSG16 -40 C Min Typ Max Min -1050 -970 -925 -975 ...

Page 7

... PLH PHL 23. V cannot exceed INPP(max 700 600 500 400 300 200 100 Figure 4. Output Voltage Amplitude (V Input Frequency (f NBSG16 = 2.375 V to 3.465 -40 C Min Typ Max Min 10.7 12 10.7 90 110 130 100 < 10 GHz ...

Page 8

... NBSG16 X = 17ps/Div Figure 5. 10.709 Gb/s Diagram (3.0 V, 255C PLH Figure 6. AC Reference Measurement Q Driver Device Figure 7. Typical Termination for Output Driver and Device Evaluation (Refer to Application Note AND8020 - Termination of ECL Logic Devices) http://onsemi.com mV/Div ( (D) ...

Page 9

... LASER MARK FOR PIN 1 IDENTIFICATION IN -X- THIS AREA D - VIEW M DETAIL K _ ROTATED 90 CLOCKWISE NBSG16 PACKAGE DIMENSIONS FCBGA-16 BA SUFFIX CASE 489-01 ISSUE FEDUCIAL FOR PIN A1 IDENTIFICATION IN THIS AREA 0. ...

Page 10

... BSC 0.118 BSC B 3.00 BSC 0.118 BSC C 0.80 1.00 0.031 0.039 D 0.23 0.28 0.009 0.011 E 1.75 1.85 0.069 0.073 F 1.75 1.85 0.069 0.073 G 0.50 BSC 0.020 BSC H 0.875 0.925 0.034 0.036 J 0.20 REF 0.008 REF K 0.00 0.05 0.000 0.002 L 0.35 0.45 0.014 0.018 M 1.50 BSC 0.059 BSC N 1.50 BSC 0.059 BSC P 0.875 0.925 0.034 0.036 R 0.60 0.80 0.024 0.031 NBSG16/D ...

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