wjce6355882211 ETC-unknow, wjce6355882211 Datasheet

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wjce6355882211

Manufacturer Part Number
wjce6355882211
Description
Nordig Unified Dvb-t Cofdm Terrestrial Demodulator For Pc-tv And Hand-held Digital Tv Dtv
Manufacturer
ETC-unknow
Datasheet
CE6355
Nordig Unified DVB-T COFDM Terrestrial
Demodulator for
PC-TV and hand-held Digital TV (DTV)
Data Sheet
Features
Applications
Description
The CE6355 is a superior fourth generation fully compliant
ETSI ETS300 744 COFDM demodulator that exceeds, with
margin, the performance requirements of all known DVB-T
digital terrestrial television standards, including Unified
Nordig and DTG.
Intel and the Intel logo are registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Compliant with ETSI 300 744 DVB-T, Nordig-Unified
1.0.2 and DTG performance specifications.
High performance with fast fully blind acquisition and
tracking capability.
Low power consumption: less than 0.32 W, and
eco-friendly standby and sleep modes.
Digital filtering of adjacent channels.
Single 8 MHz SAW filter for 6, 7 & 8 MHz OFDM.
Superior single frequency network performance.
Fast AGC to track out signal fades.
Good Doppler tracking capability.
Enhanced frequency capture range to include triple
offsets.
External 4 MHz clock or single low-cost 20.48 MHz
crystal, tolerance up to +/-200 ppm.
Automatic mode (2 K/8 K), guard and spectral inversion
detection.
Very low driver software overhead due to on-chip
state-machine control.
Novel RF level detect facility via a separate ADC.
Pre and post Viterbi-decoder bit error rates, and
uncorrectable block count.
Digital terrestrial set-top boxes
Integrated digital televisions
Personal video recorders
PC-TV receivers
Portable applications
Figure 1 - Block Diagram
Intel Corporation
Document no. D55755-002
A high performance 10 bit on-chip ADC is used to sample the
44 or 36 MHz IF analog signal. Advanced digital filtering of
the upper and lower channel enables a single 8 MHz channel
SAW filter to be used for 6, 7 and 8 MHz OFDM signal
reception. All sampling and other internal clocks are derived
from a single 20.48 MHz crystal or a 4 MHz clock input, the
tolerance of which may be relaxed as much as 200 ppm.
The CE6355 has a wide frequency capture range able to
automatically compensate for the combined offset intro-
duced by the tuner xtal and broadcaster triple frequency
offsets.
An on-chip state machine controls all acquisition and tracking
operations of the CE6355 as well as controlling the tuner via
a 2-wire bus. Any frequency range can be automatically
scanned for digital TV channels. This mechanism ensures
minimal interaction, maximum flexibility and fast acquisition
- very low software overhead.
Also included in the design is a 7-bit ADC to detect the RF
signal strength and thereby efficiently control the tuner RF
AGC.
Users have access to all the relevant signal quality infor-
mation, including input signal power level, signal-to-noise
ratio, pre-Viterbi BER, post-Viterbi BER, and the uncor-
rectable block counts. The error rate monitoring periods are
programmable over a wide range.
The device is packaged in a 7 x 7 mm 64-pin LQFP and is
very low power.
Copyright
WJCE6355 882211
WJCE6355 S L9G7 882212 64 Pin LQFP* Tape and Reel
* Pb Free Matte Tin (RoHS compliant)
Working temperature range: -40°C to +85°C
©
2006 Intel Corporation. All rights reserved.
Ordering Information
64 Pin LQFP* Trays
November 2006

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wjce6355882211 Summary of contents

Page 1

CE6355 Nordig Unified DVB-T COFDM Terrestrial Demodulator for PC-TV and hand-held Digital TV (DTV) Data Sheet Features • Compliant with ETSI 300 744 DVB-T, Nordig-Unified 1.0.2 and DTG performance specifications. • High performance with fast fully blind acquisition and tracking ...

Page 2

Data Sheet Legal information INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS ...

Page 3

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

Data Sheet 4.5.1.2 List of Equation Parameters ..........................................................................................................................................................24 4.5.1.3 Calculating Crystal Power Dissipation ......................................................................................................................................25 4.5.1.4 Capacitor Values ...................................................................................................................................................................................25 4.5.1.5 Oscillator/Clock Application Notes ..............................................................................................................................................25 5 Application Circuit........................................................................................................................................................................... 27 4 CE6355 Table of Contents Intel Corporation ...

Page 5

Figure 1 - Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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Data Sheet Table 1 - Pin Names - numeric . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 7

Pin & Package Details 1.1 Package dimensions Figure 2 - Package dimensions 1.2 Pin Outline Figure 3 - Pin Outline CE6355 Intel Corporation Data Sheet 7 ...

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Data Sheet 1.3 Pin Allocation Table 1 - Pin Names - numeric Pin Function Pin Function 1 17 Vss SADD1 2 18 Vdd SADD0 3 19 Vss CVdd 4 20 CLK1 Vss 5 21 DATA1 PLLVdd 6 22 IRQ PLLGND ...

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Pin Description Pin Description Table Pin No Name MPEG pins 47 MOSTRT 48 MOVAL 49-53, 56-58 MDO(0:4)/MDO(5:7) 61 MOCLK 62 BKERR 63 MICLK 11 STATUS 6 IRQ Control pins 4 CLK1 5 DATA1 23 XTI 24 XTO 10 SLEEP ...

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Data Sheet Pin Description Table (continued) Pin No Name 14, 20, 25, Vss 38, 40, 46, 55 AVdd 29, 32 AGnd 33 Vdd 10 CE6355 Pin Description Core and I/O ground ADC analog supply 2nd ...

Page 11

Functional Description A functional block diagram of the CE6355 OFDM demodulator is shown in Figure 4. This accepts an IF analogue signal and delivers a stream of demodulated soft decision data to the on-chip Viterbi decoder. Clock, timing and ...

Page 12

Data Sheet Figure 5 - FEC Block Diagram The FSM controller shown in Figure 4 controls both the demodulator and the FEC. It also drives the 2-wire bus to the tuner. The controller facilitates the automated search of all parameters ...

Page 13

Adjacent Channel Filtering Adjacent channels, in particular the Nicam digital sound signal associated with analogue channels, are filtered prior to the FFT. 2.5 Interpolation and Clock Synchronisation CE6355 uses digital timing recovery and this eliminates the need for an ...

Page 14

Data Sheet 2.13 De-Mapper This module generates soft decisions for demodulated bits using the channel-equalized in-phase and quadrature compo- nents of the data carriers as well as per-carrier channel state information (CSI). The de-mapping algorithm depends on the constellation (QPSK, ...

Page 15

Interfaces 3.1 2-Wire Bus 3.1.1 Host The primary 2-wire bus serial interface uses pins: • DATA1 (pin5) serial data, the most significant bit is sent first. • CLK1 (pin 4) serial clock. The 2-wire bus address is determined by ...

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Data Sheet 3.1.3 Examples of 2-wire bus messages: KEY Italics Write operation - as a slave receiver: S DEVICE W A RADD ADDRESS (n) Read operation - CE6355 as a slave transmitter: S DEVICE R A DATA ...

Page 17

Parameter CLK clock frequency (Primary) Bus free time between a STOP and START condition. Hold time (repeated) START condition. LOW period of CLK clock. HIGH period of CLK clock. Set-up time for a repeated START condition. Data hold time (when ...

Page 18

Data Sheet 3.2.2 MPEG Data Output Signals The MPEGEN bit in the CONFIG register must be set low to enable the MPEG data. The maximum movement in the packet synchronization byte position is limited to ±1 output clock period. MOCLK ...

Page 19

Figure 9 - MPEG Timing - MOCLKINV = 1 MOCLK } MDO MOSTRT MOVAL BKERRB BKERR 3.2.5 MOCLKINV 0 = MDOSWAP = 0 Delay Conditions Parameter Maximum Data output delay t 3.0 D Setup Time t 18.0 SU Hold Time ...

Page 20

Data Sheet 20 CE6355 Intel Corporation ...

Page 21

Electrical Characteristics 4.1 Operating Conditions Recommended Operating Conditions Parameter Power supply voltage: Power supply current: ‡ Input clock frequency CLK1 primary serial clock frequency Ambient operating temperature *. Current from the 3.3 V supply will be mainly dependent on ...

Page 22

Data Sheet 4.3 DC Electrical Characteristics DC Electrical Characteristics Parameter Conditions Operating periphery voltage core * Supply current 1.62>CVdd>1.98 Supply current sleep mode Outputs IOH 2mA 3.0>Vdd>3.6 IOL 2mA 3.0>Vdd>3.6 IOH 12mA Output levels 3.0>Vdd>3.6 IOL 12mA 3.0>Vdd>3.6 IOL 6mA ...

Page 23

Figure 11 - VIN & VIN equivalent circuit for inputs Figure 12 - VIN & VIN input impedance (approximate) Figure 13 - RFLEV equivalent circuit for input 4.5 Crystal Specification and External Clocking Parallel resonant fundamental frequency (preferred) Tolerance over ...

Page 24

Data Sheet Typical load capacitance Drive level Equivalent series resistance Figure 14 - Crystal Oscillator Circuit 4.5.1 Selection of External Components The capacitor values used must ensure correct operation of the Pierce oscillator such that the total loop gain is ...

Page 25

Calculating Crystal Power Dissipation To calculate the power dissipated in a crystal the following equation can be used Equation 8 power dissipated in crystal at resonant frequency (W) ...

Page 26

Data Sheet OSCOUT signal cannot be guaranteed in such a configuration. • AC coupling of a single ended external clock to XTI, with OSCMODE = 1, is possible recommended that the circuit shown in Figure 15 be used ...

Page 27

Application Circuit Figure 16 - Typical Application Circuit CE6355 Intel Corporation Data Sheet 27 ...

Page 28

Data Sheet 28 CE6355 Intel Corporation ...

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